Infineon/CYPRESS CY7C1021BV33L-15VC

The CY7C1021BV is a high-performance CMOS static random access memory organized as 65,536 words × 16 bits. The device features automatic power-down, which significantly reduces power consumption when deselected. Write operations are accomplished by asserting Chip Enable (CE) and Write Enable (WE) inputs low. Read operations are performed by asserting Chip Enable (CE) and Output Enable (OE) low while Write Enable (WE) is held high. The I/O pins are placed in a high-impedance state when the device is deselected (CE high), the outputs are disabled (OE high), BHE and BLE are disabled (BHE, BLE high), or during a write operation (CE low and WE low). The CY7C1021BV is available in a 400-mil wide SOJ, standard 44-pin TSOP Type II, and 48-ball mini-BGA packages.

• Operating voltage 3.3V (range 3.0V to 3.6V)
• High-speed performance with access time tAA of 10ns, 12ns, or 15ns
• CMOS technology for optimal balance of speed and power consumption
• Low-power version with maximum operating power dissipation of 576mW
• Low-power version with maximum standby power dissipation of 1.80mW
• Automatic power-saving mode when deselected
• Independent upper and lower byte control
• Available in 44-pin TSOP II and 400-mil SOJ packages
• Available in 48-ball micro BGA package