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TI SN74AUP3G14YFPR product image
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TI SN74AUP3G14YFPR

Manufacturer
TI
MPN
SN74AUP3G14YFPR
LCSC Part #
C2867544
Packaging
DSBGA-8
Customer #
Key Attributes
Schmitt trigger 800mV~3.6V 6.2ns@3.3V,30pF 3 500nA DSBGA-8 Gates and Inverters RoHS
DatasheetTI SN74AUP3G14YFPR
RoHS Compliance1 documents available
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QtyUnit Price(Reference Only)Total Amount
1+$ 0.7027$ 0.70
200+$ 0.2733$ 54.66
500+$ 0.2635$ 131.75
1,000+$ 0.2587$ 258.70
Standard Packaging3000/Full Reel
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters
ManufacturerTI
PackagingDSBGA-8
Input TypeSchmitt trigger
Logic Family74AUP
Voltage - Supply800mV~3.6V
Output Logic Level - Low-
Propagation Delay6.2ns@3.3V,30pF
FeaturesPower shutdown protection;Noise suppression function
Input Logic Level - Low100mV~880mV
Input Logic Level - High600mV~2.29V
Operating Temperature-40℃~+85℃
Number of Circuits3
Output Logic Level - High-
Quiescent Current(Iq)500nA
Current - Output High(IOH)4mA
Current - Output Low(IOL)4mA
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Introduction

AI Translation

The SN74AUP3G14 contains three inverters and performs the Boolean function Y = A(overline). The device functions as three independent inverters but, because of Schmitt action, it may have different input threshold levels for positive-going (VT₊) and negative-going (VT₋) signals. NanoStar package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Iₒff. The Iₒff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Features

AI Translation
  • Available in the Texas Instruments NanoStar Package
  • Low Static-Power Consumption (Icc = 0.9 μA Maximum)
  • Low Dynamic-Power Consumption (Cpd = 4.3 pF Typ at 3.3 V)
  • Low Input Capacitance (Ci = 1.5 pF Typical)
  • Low Noise – Overshoot and Undershoot < 10% of Vcc
  • Ioff Supports Partial-Power-Down Mode Operation
  • Wide Operating Vcc Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 4.3 ns Maximum at 3.3 V
  • Suitable for Point-to-Point Applications
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)