ISSI IS64WV2568EDBLL-10BLA3-TR

The ISSI IS61/64WV2568EDBLL is a high-speed, 2,097,152-bit static RAMs organized as 262,144 words by 8 bits. It is fabricated using high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE (overline)) controls both writing and reading of the memory. The IS61/64WV2568EDBLL is packaged in the JEDEC standard 44-pin TSOP-II, 36-pin SOJ and 36-pin Mini BGA (6mm x 8mm).

• High-speed access time: 8, 10 ns
• Low Active Power: 85 mW (typical)
• Low Standby Power: 7 mW (typical)
• CMOS standby
• Single power supply — Vdd 2.4V to 3.6V (10 ns) Vdd 3.3V ± 10% (8 ns)
• Fully static operation: no clock or refresh required
• Three state outputs
• Industrial and Automotive temperature support
• Lead-free available
• Error Detection and Error Correction
• Independent ECC with hamming code for each byte
• Detect and correct one bit error per byte
• Better reliability than parity code schemes which can only detect an error but not correct an error
• Backward Compatible: Drop in replacement to current in industry standard devices (without ECC)