MICROCHIP KSZ8842-32MQLA6

The KSZ8842-series of 2-port switches includes PCI and non-PCI CPU interfaces, and are available in 8-/16-bit and 32-bit bus designs. This data sheet describes the KSZ8842M-series of non-PCI CPU interface chips. The KSZ8842M is the first fully managed, 2-port switch with a non-PCI CPU interface. It is based on a proven, 4th generation, integrated Layer-2 switch, compliant with IEEE 802.3u standards. Also an industrial temperature grade version of the KSZ8842, the KSZ8842MVLI, can be ordered. The KSZ8842M can be configured as a switch or as a low-latency (≤310 nano

• Switch Management:
  • Non-Blocking Switch Fabric Assures Fast Packet Delivery by Utilizing a 1K Entry Forwarding Table and a Store-and-Forward Architecture
  • Fully Compliant with IEEE 802.3u Standards
  • Full-Duplex IEEE 802.3x Flow Control (Pause) with Force Mode Option
  • Half-Duplex Back Pressure Flow Control
• Advanced Switch Management:
  • IEEE 802.1Q VLAN Support for Up to 16 Groups (Full Range of VLAN IDs)
  • VLAN ID Tag/Untag Options, on a Per Port Basis
  • IEEE 802.1p/Q Tag Insertion or Removal on a Per Port Basis (Egress)
  • Programmable Rate Limiting at the Ingress and Egress Ports
  • Broadcast Storm Protection
  • IEEE 802.1d Spanning Tree Protocol Support
  • MAC Filtering Function to Filter or Forward Unknown Unicast Packets
  • Direct Forwarding Mode Enabling the Processor to Identify the Ingress Port and to Specify the Egress Port
  • Internet Group Management Protocol (IGMP) v1/ v2 Snooping Support for Multicast Packet Filtering
  • IPV6 Multicast Listener Discovery (MLD) Snooping Support
• Monitoring:
  • Port Mirroring/Monitoring/Sniffing: Ingress and/or Egress Traffic to Any Port
  • MIB Counters for Fully Compliant Statistics Gathering - 34 MIB Counters Per Port
  • Loopback Modes for Remote Failure Diagnostics
• Comprehensive Register Access:
  • Control Registers Configurable On-the-Fly (PortPriority, 802.1p/d/Q)
• QoS/CoS Packets Prioritization Support:
  • Per Port, 802.1p and DiffServ-Based
  • Remapping of 802.1p Priority Field on a Per Port Basis
• Power Modes, Packaging, and Power Supplies:
  • Full-Chip Hardware Power-Down (Register Configuration not Saved) Allows Low Power Dissipation
  • Per Port-Based, Software Power-Save on PHY (Idle Link Detection, Register Configuration Preserved)
  • Single Power Supply: 3.3V
  • Commercial Temperature Range: 0℃ to +70℃
  • Industrial Temperature Range: -40℃ to +85℃
  • Available in 128-pin PQFP, 100-ball LFBGA, and 128-pin LQFP
  • Available in -16 Version for 8/16-Bit Bus Support and -32 version for 32-Bit Bus Support
• Additional Features:
  • Repeater Mode Capabilities to Allow for Cut Through in Latency Critical Industrial Ethernet or Embedded Ethernet Applications
  • Dynamic Buffer Memory Scheme - Essential for Applications Such as Video over IP where Image Jitter is Unacceptable
  • 2-Port Switch with a Flexible 8-Bit, 16-Bit, or 32-Bit Generic Host Processor Interfaces
  • Microchip LinkMD Cable Diagnostic to Determine Cable Length, Diagnose Faulty Cables, and Determine Distance to Fault
  • Hewlett Packard (HP) Auto-MDIX Crossover with Disable and Enable Options
  • Four Priority Queues to Handle Voice, Video, Data, and Control Packets
  • Ability to Transmit and Receive Frames up to 1916 bytes

• Video Distribution Systems
• High-End Cable, Satellite, and IP Set-Top Boxes
• Video over IP
• Voice over IP (VoIP) and Analog Telephone Adapters (ATA)
• Industrial Control in Latency Critical Applications
• Motion Control
• Industrial Control Sensor Devices (Temperature, Pressure, Levels, and Valves)
• Security and Surveillance Cameras