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RENESAS 854S712AKILFT product image
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RENESAS 854S712AKILFT

Manufacturer
MPN
854S712AKILFT
LCSC Part #
C1511202
Packaging
VFQFPN-16(3x3)
Customer #
Key Attributes
3.135V~3.465V 3GHz 2 VFQFPN-16(3x3) Clock Buffers, Drivers RoHS
DatasheetRENESAS 854S712AKILFT
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QtyUnit Price(Reference Only)Total Amount
1+$ 8.608$ 8.61
200+$ 3.3324$ 666.48
500+$ 3.2151$ 1607.55
1,000+$ 3.1564$ 3156.40
Standard Packaging2500/Full Reel
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Clock/Timing/Clock Buffers, Drivers
ManufacturerRENESAS
PackagingVFQFPN-16(3x3)
Operating Temperature-40℃~+85℃
Voltage - Supply3.135V~3.465V
FeaturesMulti-channel fan-out/isolation drive;Output enable/shutdown;Internal termination and bias network
Number of Inputs1
Output Frequency(Max)3GHz
Number of outputs2

Introduction

AI Translation

The 854S712 is a differential, high-speed 1:2 data/clock fanout buffer and line driver. The outputs support pre-emphasis in order to drive backplanes and long transmission lines while reducing inter-symbol interference effects. The pre-emphasis level is configurable to optimize for low bit error rate or power consumption. Pre-emphasis utilizes an increased output voltage swing for transition bits. The device is optimized for data rates up to 4.5 Gbps (NRZ) and for deterministic jitter in data applications and low additive jitter in clock applications. The outputs are LVDS-compliant while the differential input is compatible with a variety of signal levels such as LVDS, LVPECL and CML. Internal input termination, a bias voltage output for AC-coupling and small packaging (VFQFN) supports space-efficient board designs. The 854S712 operates from a 3.3V power supply and supports the industrial temperature range of -40°C to +85°C.

Features

AI Translation
  • 1:2 differential data/clock fanout buffer and line driver
  • 4.5 Gbps data rate (NRZ) (maximum)
  • Differential LVDS outputs
  • Differential input supporting LVDS, LVPECL and CML levels
  • Configurable output pre-emphasis
  • Low-skew outputs: 10ps (maximum)
  • Low data deterministic jitter: 4ps (maximum)
  • LVCMOS interface levels for the control inputs
  • Asynchronous output disable into high-impedance state
  • Internal input termination: 100Ω (Differential)
  • Additive phase jitter, RMS: 0.08ps (typical)
  • Full 3.3V supply voltage
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package