NXP MC9S08DZ96MLL
| Manufacturer | |
| MPN | MC9S08DZ96MLL |
| LCSC Part # | C1344993 |
| Packaging | LQFP-100(14x14) |
| Customer # | |
| Key Attributes | S08 8 Bit 40MHz LQFP-100(14x14) Microcontrollers RoHS |
| Datasheet | NXP MC9S08DZ96MLL |
| RoHS Compliance | 2 documents available |
| Alternative Parts | 6 |
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | NXP | |
| Packaging | LQFP-100(14x14) | |
| ADC (Bit) | 12bit | |
| Number of I/O | 87 | |
| Operating Temperature | -40℃~+125℃ | |
| Voltage - Supply | 2.7V~5.5V | |
| Program Memory Type | FLASH | |
| EEPROM | 2KB | |
| Program Storage Size | 96KB | |
| CPU Core | S08 | |
| Core Size | 8 Bit | |
| CPU Maximum Speed | 40MHz | |
| Oscillator Type | External |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | NXP | |
| Packaging | LQFP-100(14x14) | |
| ADC (Bit) | 12bit | |
| Number of I/O | 87 | |
| Operating Temperature | -40℃~+125℃ | |
| Voltage - Supply | 2.7V~5.5V |
| Type | Description | |
|---|---|---|
| Program Memory Type | FLASH | |
| EEPROM | 2KB | |
| Program Storage Size | 96KB | |
| CPU Core | S08 | |
| Core Size | 8 Bit | |
| CPU Maximum Speed | 40MHz | |
| Oscillator Type | External |
Help & FeedbackShow similar products (0) >
Features
AI Translation
- 40-MHz HCS08 CPU (20-MHz bus)
- HC08 instruction set with added BGND instruction
- Support for up to 32 interrupt/reset sources
- Flash read/program/erase over full operating voltage and temperature
- Up to 3K Random-access memory (RAM)
- Two very low power stop modes
- Reduced power wait mode
- Very low power real time interrupt for use in run, wait, and stop
- Oscillator (XOSC) — Loop-control Pierce oscillator; Crystal or ceramic resonator range of 31.25 kHz to 38.4 kHz or 1 MHz to 16 MHz
- Multi-purpose Clock Generator (MCG) — PLL and FLL modes (FLL capable of 1.5% deviation using internal temperature compensation); Internal reference clock with trim adjustment (trimmed at factory, with trim value stored in flash); External reference with oscillator/resonator options
- Watchdog computer operating properly (COP) reset with option to run from backup dedicated 1-kHz internal clock source or bus clock
- Low-voltage detection with reset or interrupt; selectable trip points
- Illegal opcode detection with reset
- Illegal address detection with reset
- Flash block protect
- Loss-of-lock protection
- Single-wire background debug interface
- On-chip, in-circuit emulation (ICE) with real-time bus capture
- ADC — 16-channel, 12-bit resolution, 2.5 μs conversion time, automatic compare function, temperature sensor, internal bandgap reference channel
- ACMPx — Two analog comparators with selectable interrupt on rising, falling, or either edge of comparator output; compare option to fixed internal bandgap reference voltage
- MSCAN — CAN protocol - Version 2.0 A, B; standard and extended data frames; Support for remote frames; Five receive buffers with FIFO storage scheme; Flexible identifier acceptance filters programmable as: 2x 32-bit, 4x 16-bit, or 8x 8-bit
- SCIx — Up to Two SCIs supporting LIN 2.0 Protocol and SAE J2602 protocols; Full duplex non-return to zero (NRZ); Master extended break generation; Slave extended break detection; Wakeup on active edge
- SPI — Full-duplex or single-wire bidirectional; Double-buffered transmit and receive; Master or Slave mode; MSB-first or LSB-first shifting
- IIC — Up to 100 kbps with maximum bus loading; Multi-master operation; Programmable slave address; General Call Address; Interrupt driven byte-by-byte data transfer
- TPMx — One 6-channel (TPM1) and one 2-channel (TPM2); Selectable input capture, output compare, or buffered edge-aligned PWM on each channel
- RTC — (Real-time counter) 8-bit modulus counter with binary or decimal based prescaler; External clock source for precise time base, time-of-day, calendar or task scheduling functions; Free running on-chip low power oscillator <1 kHz> for cyclic wake-up without external components
- 53 general-purpose input/output (I/O) pins and 1 input-only pin
- 24 interrupt pins with selectable polarity on each pin
- Hysteresis and configurable pull device on all input pins
- Configurable slew rate and drive strength on all output pins
- 64-pin low-profile quad flat-pack (LQFP) — 10x10 mm
- 48-pin low-profile quad flat-pack (LQFP) — 7x7 mm
- 32-pin low-profile quad flat-pack (LQFP) — 7x7 mm
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| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 9.4105 | $ 9.41 |
| 200+ | $ 3.6418 | $ 728.36 |
| 450+ | $ 3.5137 | $ 1581.17 |
| 900+ | $ 3.4505 | $ 3105.45 |
Standard Packaging450/Full Tray | ||
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Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | NXP | |
| Packaging | LQFP-100(14x14) | |
| ADC (Bit) | 12bit | |
| Number of I/O | 87 | |
| Operating Temperature | -40℃~+125℃ | |
| Voltage - Supply | 2.7V~5.5V | |
| Program Memory Type | FLASH | |
| EEPROM | 2KB | |
| Program Storage Size | 96KB | |
| CPU Core | S08 | |
| Core Size | 8 Bit | |
| CPU Maximum Speed | 40MHz | |
| Oscillator Type | External |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | NXP | |
| Packaging | LQFP-100(14x14) | |
| ADC (Bit) | 12bit | |
| Number of I/O | 87 | |
| Operating Temperature | -40℃~+125℃ | |
| Voltage - Supply | 2.7V~5.5V |
| Type | Description | |
|---|---|---|
| Program Memory Type | FLASH | |
| EEPROM | 2KB | |
| Program Storage Size | 96KB | |
| CPU Core | S08 | |
| Core Size | 8 Bit | |
| CPU Maximum Speed | 40MHz | |
| Oscillator Type | External |
Help & FeedbackShow similar products (0) >
Features
AI Translation
- 40-MHz HCS08 CPU (20-MHz bus)
- HC08 instruction set with added BGND instruction
- Support for up to 32 interrupt/reset sources
- Flash read/program/erase over full operating voltage and temperature
- Up to 3K Random-access memory (RAM)
- Two very low power stop modes
- Reduced power wait mode
- Very low power real time interrupt for use in run, wait, and stop
- Oscillator (XOSC) — Loop-control Pierce oscillator; Crystal or ceramic resonator range of 31.25 kHz to 38.4 kHz or 1 MHz to 16 MHz
- Multi-purpose Clock Generator (MCG) — PLL and FLL modes (FLL capable of 1.5% deviation using internal temperature compensation); Internal reference clock with trim adjustment (trimmed at factory, with trim value stored in flash); External reference with oscillator/resonator options
- Watchdog computer operating properly (COP) reset with option to run from backup dedicated 1-kHz internal clock source or bus clock
- Low-voltage detection with reset or interrupt; selectable trip points
- Illegal opcode detection with reset
- Illegal address detection with reset
- Flash block protect
- Loss-of-lock protection
- Single-wire background debug interface
- On-chip, in-circuit emulation (ICE) with real-time bus capture
- ADC — 16-channel, 12-bit resolution, 2.5 μs conversion time, automatic compare function, temperature sensor, internal bandgap reference channel
- ACMPx — Two analog comparators with selectable interrupt on rising, falling, or either edge of comparator output; compare option to fixed internal bandgap reference voltage
- MSCAN — CAN protocol - Version 2.0 A, B; standard and extended data frames; Support for remote frames; Five receive buffers with FIFO storage scheme; Flexible identifier acceptance filters programmable as: 2x 32-bit, 4x 16-bit, or 8x 8-bit
- SCIx — Up to Two SCIs supporting LIN 2.0 Protocol and SAE J2602 protocols; Full duplex non-return to zero (NRZ); Master extended break generation; Slave extended break detection; Wakeup on active edge
- SPI — Full-duplex or single-wire bidirectional; Double-buffered transmit and receive; Master or Slave mode; MSB-first or LSB-first shifting
- IIC — Up to 100 kbps with maximum bus loading; Multi-master operation; Programmable slave address; General Call Address; Interrupt driven byte-by-byte data transfer
- TPMx — One 6-channel (TPM1) and one 2-channel (TPM2); Selectable input capture, output compare, or buffered edge-aligned PWM on each channel
- RTC — (Real-time counter) 8-bit modulus counter with binary or decimal based prescaler; External clock source for precise time base, time-of-day, calendar or task scheduling functions; Free running on-chip low power oscillator <1 kHz> for cyclic wake-up without external components
- 53 general-purpose input/output (I/O) pins and 1 input-only pin
- 24 interrupt pins with selectable polarity on each pin
- Hysteresis and configurable pull device on all input pins
- Configurable slew rate and drive strength on all output pins
- 64-pin low-profile quad flat-pack (LQFP) — 10x10 mm
- 48-pin low-profile quad flat-pack (LQFP) — 7x7 mm
- 32-pin low-profile quad flat-pack (LQFP) — 7x7 mm
C1344993 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Type | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |
Alternative Parts
| MPN | Manufacturer | Packaging | Availability | Unit Price | ||
|---|---|---|---|---|---|---|
| MC9S08DZ96CLL | NXP | LQFP-100(14x14) | 0 | $ 11.0254 | ||
| MC9S08DZ128MLL | NXP | LQFP-100(14x14) | 0 | $ 20.5403 | ||
| MC9S08DZ128CLL | NXP | LQFP-100(14x14) | 0 | $ 9.227 | ||
| S9S08DZ96F2MLL | NXP | LQFP-100(14x14) | 0 | $ 13.3615 | ||
| S9S08DZ96F2VLL | NXP | LQFP-100(14x14) | 0 | $ 12.7244 | ||
| S9S08DZ128F2VLL | NXP | LQFP-100(14x14) | 0 | $ 14.3942 |

