ST STM32MP153FAA1
| Manufacturer | |
| MPN | STM32MP153FAA1 |
| LCSC Part # | C1236717 |
| Packaging | LFBGA-448 |
| Customer # | |
| Key Attributes | MPU with Arm Dual Cortex-A7 800 MHz, Arm Cortex-M4 real-time coprocessor, TFT display, FD-CAN, Secure boot and Cryptography |
| Datasheet | ST STM32MP153FAA1 |
| RoHS Compliance | 3 documents available |
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microprocessors | |
| Manufacturer | ST | |
| Packaging | LFBGA-448 | |
| CPU Core | ARM Cortex-ASeries | |
| CPU Maximum Speed | 209MHz;800MHz |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microprocessors | |
| Manufacturer | ST | |
| Packaging | LFBGA-448 |
| Type | Description | |
|---|---|---|
| CPU Core | ARM Cortex-ASeries | |
| CPU Maximum Speed | 209MHz;800MHz |
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Introduction
AI Translation
Arm dual-core Cortex-A7 800 MHz + Cortex-M4 microprocessor with TFT display capability, 37 communication interfaces, 29 timers, advanced analog features, and cryptographic functions.
Features
AI Translation
- 32-bit dual-core Arm Cortex-A7, each core with 32KB instruction cache and 32KB data cache, 256KB unified L2 cache, supporting Arm NEON and Arm TrustZone
- 32-bit Arm Cortex-M4 with FPU/MPU, up to 209 MHz (up to 703 CoreMark)
- External DDR memory up to 1GB, supporting LPDDR2/LPDDR3-1066 16/32-bit, DDR3/DDR3L-1066 16/32-bit
- Internal SRAM total 708KB: 256KB AXI SYSRAM + 384KB AHB SRAM + 64KB backup domain AHB SRAM + 4KB backup domain SRAM
- Dual-mode Quad-SPI memory interface
- Flexible external memory controller with 16-bit data bus, supporting external ICs and SLC NAND memory with 8-bit ECC
- Secure boot, TrustZone peripherals, active tamper detection
- Cortex-M4 resource isolation
- I/O supply voltage 1.71V to 3.6V (5V-tolerant I/O)
- POR, PDR, PVD, and BOR support
- On-chip LDO (RETRAM, BKPSRAM, USB 1.8V, 1.1V)
- Backup regulator ~0.9V
- Internal temperature sensor
- Low-power modes: Sleep, Stop, and Standby
- Package types: LFBGA448 (18×18mm), LFBGA354 (16×16mm) (0.8mm pitch); TFBGA361 (12×12mm), TFBGA257 (10×10mm) (min. 0.5mm pitch)
- DDR memory retention in Standby mode
- PMIC companion chip control
- Total current as low as 2μA in Standby mode (no RTC, no LSE, no BKPSRAM, no RETRAM)
- Internal oscillators: 64MHz HSI, 4MHz CSI, 32kHz LSI; external oscillators: 8–48MHz HSE, 32.768kHz LSE; 5 PLLs with fractional mode
- Up to 176 I/O ports with interrupt capability, up to 8 secure I/Os; up to 6 wake-up, 3 tamper, 1 active tamper
- 2 bus matrices: 64-bit Arm AMBA AXI interconnect (up to 266MHz), 32-bit Arm AMBA AHB interconnect (up to 209MHz)
- 3 DMA controllers with 48 physical channels: 1 high-speed general-purpose master DMA controller (MDMA), 2 dual-port DMAs (with FIFO and request router)
- Up to 37 communication peripherals: 6× I2C FM+ (1Mbit/s, SMBus/PMBus support), 4× UART + 4× USART (12.5Mbit/s, ISO7816, LIN, IrDA, SPI slave support), 6× SPI (50Mbit/s, including 3 with full-duplex I2S audio-class accuracy), 4× SAI (stereo audio), SPDIF Rx (4 inputs), HDMI-CEC interface, MDIO slave interface, 3× SDMMC (up to 8-bit), 2× CAN controller (CAN FD support, one with TTCAN), USB2.0 high-speed Host+OTG combo, 10/100M or Gigabit Ethernet GMAC (IEEE1588v2), 8–14-bit camera interface (up to 140MB/s)
- 6 analog peripherals: 2× ADC (up to 16-bit resolution), 1× temperature sensor, 2× 12-bit DAC (1MHz), 1× DFSDM (8 channels/6 filters), internal or external ADC/DAC reference VREF+
- LCD-TFT controller (up to 24-bit RGB888), supporting up to WXGA@60fps or Full HD@30fps, pixel clock up to 90MHz, two-layer programmable color LUT
In-Stock: 10
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| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 24.1806 | $ 24.18 |
| 30+ | $ 22.9663 | $ 688.99 |
Standard Packaging84/Full Tray | ||
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Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microprocessors | |
| Manufacturer | ST | |
| Packaging | LFBGA-448 | |
| CPU Core | ARM Cortex-ASeries | |
| CPU Maximum Speed | 209MHz;800MHz |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microprocessors | |
| Manufacturer | ST | |
| Packaging | LFBGA-448 |
| Type | Description | |
|---|---|---|
| CPU Core | ARM Cortex-ASeries | |
| CPU Maximum Speed | 209MHz;800MHz |
Help & FeedbackShow similar products (0) >
Introduction
AI Translation
Arm dual-core Cortex-A7 800 MHz + Cortex-M4 microprocessor with TFT display capability, 37 communication interfaces, 29 timers, advanced analog features, and cryptographic functions.
Features
AI Translation
- 32-bit dual-core Arm Cortex-A7, each core with 32KB instruction cache and 32KB data cache, 256KB unified L2 cache, supporting Arm NEON and Arm TrustZone
- 32-bit Arm Cortex-M4 with FPU/MPU, up to 209 MHz (up to 703 CoreMark)
- External DDR memory up to 1GB, supporting LPDDR2/LPDDR3-1066 16/32-bit, DDR3/DDR3L-1066 16/32-bit
- Internal SRAM total 708KB: 256KB AXI SYSRAM + 384KB AHB SRAM + 64KB backup domain AHB SRAM + 4KB backup domain SRAM
- Dual-mode Quad-SPI memory interface
- Flexible external memory controller with 16-bit data bus, supporting external ICs and SLC NAND memory with 8-bit ECC
- Secure boot, TrustZone peripherals, active tamper detection
- Cortex-M4 resource isolation
- I/O supply voltage 1.71V to 3.6V (5V-tolerant I/O)
- POR, PDR, PVD, and BOR support
- On-chip LDO (RETRAM, BKPSRAM, USB 1.8V, 1.1V)
- Backup regulator ~0.9V
- Internal temperature sensor
- Low-power modes: Sleep, Stop, and Standby
- Package types: LFBGA448 (18×18mm), LFBGA354 (16×16mm) (0.8mm pitch); TFBGA361 (12×12mm), TFBGA257 (10×10mm) (min. 0.5mm pitch)
- DDR memory retention in Standby mode
- PMIC companion chip control
- Total current as low as 2μA in Standby mode (no RTC, no LSE, no BKPSRAM, no RETRAM)
- Internal oscillators: 64MHz HSI, 4MHz CSI, 32kHz LSI; external oscillators: 8–48MHz HSE, 32.768kHz LSE; 5 PLLs with fractional mode
- Up to 176 I/O ports with interrupt capability, up to 8 secure I/Os; up to 6 wake-up, 3 tamper, 1 active tamper
- 2 bus matrices: 64-bit Arm AMBA AXI interconnect (up to 266MHz), 32-bit Arm AMBA AHB interconnect (up to 209MHz)
- 3 DMA controllers with 48 physical channels: 1 high-speed general-purpose master DMA controller (MDMA), 2 dual-port DMAs (with FIFO and request router)
- Up to 37 communication peripherals: 6× I2C FM+ (1Mbit/s, SMBus/PMBus support), 4× UART + 4× USART (12.5Mbit/s, ISO7816, LIN, IrDA, SPI slave support), 6× SPI (50Mbit/s, including 3 with full-duplex I2S audio-class accuracy), 4× SAI (stereo audio), SPDIF Rx (4 inputs), HDMI-CEC interface, MDIO slave interface, 3× SDMMC (up to 8-bit), 2× CAN controller (CAN FD support, one with TTCAN), USB2.0 high-speed Host+OTG combo, 10/100M or Gigabit Ethernet GMAC (IEEE1588v2), 8–14-bit camera interface (up to 140MB/s)
- 6 analog peripherals: 2× ADC (up to 16-bit resolution), 1× temperature sensor, 2× 12-bit DAC (1MHz), 1× DFSDM (8 channels/6 filters), internal or external ADC/DAC reference VREF+
- LCD-TFT controller (up to 24-bit RGB888), supporting up to WXGA@60fps or Full HD@30fps, pixel clock up to 90MHz, two-layer programmable color LUT
C1236717 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 5A992C |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 5A992C |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Type | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |



