TI 54ABT573J-QML
| Manufacturer | |
| MPN | 54ABT573J-QML |
| LCSC Part # | C4989103 |
| Packaging | DIP-20 |
| Customer # | |
| Key Attributes | D Latch 4.5V~5.5V 8 DIP-20 Latches |
| Datasheet | TI 54ABT573J-QML |
| Alternative Parts | 5 |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | TI | |
| Packaging | DIP-20 | |
| Quiescent Current | 50uA | |
| Series | 54ABT | |
| Logic Type | D Latch | |
| Voltage - Supply | 4.5V~5.5V | |
| Output Type | Tri-State | |
| Current - Output Low(IOL) | 48mA | |
| Operating Temperature | -55℃~+125℃ | |
| Setup Time | 2.5ns | |
| Number of Gates | 8 | |
| Current - Output High(IOH) | 24mA | |
| Hold Time | 2.5ns | |
| Propagation Delay | - |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | TI | |
| Packaging | DIP-20 | |
| Quiescent Current | 50uA | |
| Series | 54ABT | |
| Logic Type | D Latch | |
| Voltage - Supply | 4.5V~5.5V | |
| Output Type | Tri-State |
| Type | Description | |
|---|---|---|
| Current - Output Low(IOL) | 48mA | |
| Operating Temperature | -55℃~+125℃ | |
| Setup Time | 2.5ns | |
| Number of Gates | 8 | |
| Current - Output High(IOH) | 24mA | |
| Hold Time | 2.5ns | |
| Propagation Delay | - |
Introduction
The 54ABT573 is an octal D-type latch with TRI-STATE outputs, featuring a buffered common latch enable (LE) and a buffered common output enable (OE) input. This device is functionally identical to the ABT373 but has a different pin assignment. The 54ABT573 contains eight D-type latches with TRI-STATE output buffers. When the latch enable (LE) input is HIGH, data at the Dn inputs enters the latches; in this state the latches are transparent, meaning the latch outputs change state in response to changes at the D inputs. When LE is LOW, the latches store the information present at the D inputs during the setup time before the HIGH-to-LOW transition of LE. The TRI-STATE buffers are controlled by the output enable (OE) input; when OE is LOW, the buffers are in the two-state mode; when OE is HIGH, the buffers are in the high-impedance mode, which does not affect new data being entered into the latches.
Features
- Inputs and outputs arranged on opposite sides of the package for easy microprocessor interfacing
- Usable as microprocessor input or output port
- Functionally equivalent to 'ABT373
- TRI-STATE outputs for bus interface applications
- 48mA sink / 24mA source output current capability
- Output switching characteristics specified for 50pF and 250pF loads
- Guaranteed latch-up protection
- High-impedance, glitch-free bus loading maintained throughout power-up and power-down
- Non-destructive hot-insertion capability
Applications
- Microprocessor input port
- Microprocessor output port
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | TI | |
| Packaging | DIP-20 | |
| Quiescent Current | 50uA | |
| Series | 54ABT | |
| Logic Type | D Latch | |
| Voltage - Supply | 4.5V~5.5V | |
| Output Type | Tri-State | |
| Current - Output Low(IOL) | 48mA | |
| Operating Temperature | -55℃~+125℃ | |
| Setup Time | 2.5ns | |
| Number of Gates | 8 | |
| Current - Output High(IOH) | 24mA | |
| Hold Time | 2.5ns | |
| Propagation Delay | - |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Latches | |
| Manufacturer | TI | |
| Packaging | DIP-20 | |
| Quiescent Current | 50uA | |
| Series | 54ABT | |
| Logic Type | D Latch | |
| Voltage - Supply | 4.5V~5.5V | |
| Output Type | Tri-State |
| Type | Description | |
|---|---|---|
| Current - Output Low(IOL) | 48mA | |
| Operating Temperature | -55℃~+125℃ | |
| Setup Time | 2.5ns | |
| Number of Gates | 8 | |
| Current - Output High(IOH) | 24mA | |
| Hold Time | 2.5ns | |
| Propagation Delay | - |
Introduction
The 54ABT573 is an octal D-type latch with TRI-STATE outputs, featuring a buffered common latch enable (LE) and a buffered common output enable (OE) input. This device is functionally identical to the ABT373 but has a different pin assignment. The 54ABT573 contains eight D-type latches with TRI-STATE output buffers. When the latch enable (LE) input is HIGH, data at the Dn inputs enters the latches; in this state the latches are transparent, meaning the latch outputs change state in response to changes at the D inputs. When LE is LOW, the latches store the information present at the D inputs during the setup time before the HIGH-to-LOW transition of LE. The TRI-STATE buffers are controlled by the output enable (OE) input; when OE is LOW, the buffers are in the two-state mode; when OE is HIGH, the buffers are in the high-impedance mode, which does not affect new data being entered into the latches.
Features
- Inputs and outputs arranged on opposite sides of the package for easy microprocessor interfacing
- Usable as microprocessor input or output port
- Functionally equivalent to 'ABT373
- TRI-STATE outputs for bus interface applications
- 48mA sink / 24mA source output current capability
- Output switching characteristics specified for 50pF and 250pF loads
- Guaranteed latch-up protection
- High-impedance, glitch-free bus loading maintained throughout power-up and power-down
- Non-destructive hot-insertion capability
Applications
- Microprocessor input port
- Microprocessor output port
C4989103 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |