TI ADC12DL040CIVSX/NOPB
| Manufacturer | |
| MPN | ADC12DL040CIVSX/NOPB |
| LCSC Part # | C701599 |
| Packaging | TQFP-64(10x10) |
| Customer # | |
| Key Attributes | Parallel port 2.7V~3.6V TQFP-64(10x10) Analog to Digital Converters (ADC) RoHS |
| Datasheet | TI ADC12DL040CIVSX/NOPB |
| RoHS Compliance | 1 documents available |
| Alternative Parts | 6 |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC) | |
| Manufacturer | TI | |
| Packaging | TQFP-64(10x10) | |
| Operating Temperature | -40℃~+85℃ | |
| Interface | Parallel port | |
| Quiescent Current (Iq) | 12mA | |
| Voltage - Supply | 2.7V~3.6V | |
| Number of Channels | 2 | |
| Integral non - linearity | 2.6LSB | |
| Voltage Reference | Built-in | |
| Clock/Oscillator | External | |
| Clock Frequency | 10MHz~40MHz | |
| Features | Multiplexers | |
| Resolution(Bits) | 40MHz;12 | |
| S/N Ratio | 69dB | |
| DNL (LSB) | 0.3LSB | |
| ADC architecture | Pipeline | |
| Programmable Gain | Not supported |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC) | |
| Manufacturer | TI | |
| Packaging | TQFP-64(10x10) | |
| Operating Temperature | -40℃~+85℃ | |
| Interface | Parallel port | |
| Quiescent Current (Iq) | 12mA | |
| Voltage - Supply | 2.7V~3.6V | |
| Number of Channels | 2 | |
| Integral non - linearity | 2.6LSB |
| Type | Description | |
|---|---|---|
| Voltage Reference | Built-in | |
| Clock/Oscillator | External | |
| Clock Frequency | 10MHz~40MHz | |
| Features | Multiplexers | |
| Resolution(Bits) | 40MHz;12 | |
| S/N Ratio | 69dB | |
| DNL (LSB) | 0.3LSB | |
| ADC architecture | Pipeline | |
| Programmable Gain | Not supported |
Introduction
The ADC12DL040 is a dual-channel, low-power CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at a rate of 40 mega samples per second (MSPS). The converter employs a differential pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption while delivering excellent dynamic performance. It also features a 250 MHz full-power bandwidth. The ADC12DL040 operates from a single +3.0V supply and consumes only 210 mW of power at 40 MSPS (including reference current). The device includes a power-down feature that reduces power consumption to 36 mW. The differential inputs provide a full-scale differential input swing equal to 2× VREF and support single-ended inputs. Full utilization of the differential inputs is recommended for optimal performance. The digital outputs of both ADCs are accessible via a single multiplexed 12-bit bus or separate buses. Duty cycle stabilization and output data format are selectable via tri-state function pins; output data can be configured as offset binary or two's complement. To facilitate interfacing with low-voltage systems, the digital output driver supply pin of the ADC12DL040 can be connected to a separate supply voltage ranging from +2.4V to the analog supply voltage. The device is available in a 64-pin TQFP package and operates over the industrial temperature range of -40°C to +85°C.
Applications
- Ultrasound and imaging
- Instrumentation
- Communications receivers
- xDSL
- Cable modems
- DSP front-end
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 36.946 | $ 36.95 |
| 200+ | $ 14.2977 | $ 2859.54 |
| 500+ | $ 13.7951 | $ 6897.55 |
| 1,000+ | $ 13.5478 | $ 13547.80 |
Standard Packaging1000/Full Reel | ||
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC) | |
| Manufacturer | TI | |
| Packaging | TQFP-64(10x10) | |
| Operating Temperature | -40℃~+85℃ | |
| Interface | Parallel port | |
| Quiescent Current (Iq) | 12mA | |
| Voltage - Supply | 2.7V~3.6V | |
| Number of Channels | 2 | |
| Integral non - linearity | 2.6LSB | |
| Voltage Reference | Built-in | |
| Clock/Oscillator | External | |
| Clock Frequency | 10MHz~40MHz | |
| Features | Multiplexers | |
| Resolution(Bits) | 40MHz;12 | |
| S/N Ratio | 69dB | |
| DNL (LSB) | 0.3LSB | |
| ADC architecture | Pipeline | |
| Programmable Gain | Not supported |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC) | |
| Manufacturer | TI | |
| Packaging | TQFP-64(10x10) | |
| Operating Temperature | -40℃~+85℃ | |
| Interface | Parallel port | |
| Quiescent Current (Iq) | 12mA | |
| Voltage - Supply | 2.7V~3.6V | |
| Number of Channels | 2 | |
| Integral non - linearity | 2.6LSB |
| Type | Description | |
|---|---|---|
| Voltage Reference | Built-in | |
| Clock/Oscillator | External | |
| Clock Frequency | 10MHz~40MHz | |
| Features | Multiplexers | |
| Resolution(Bits) | 40MHz;12 | |
| S/N Ratio | 69dB | |
| DNL (LSB) | 0.3LSB | |
| ADC architecture | Pipeline | |
| Programmable Gain | Not supported |
Introduction
The ADC12DL040 is a dual-channel, low-power CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at a rate of 40 mega samples per second (MSPS). The converter employs a differential pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption while delivering excellent dynamic performance. It also features a 250 MHz full-power bandwidth. The ADC12DL040 operates from a single +3.0V supply and consumes only 210 mW of power at 40 MSPS (including reference current). The device includes a power-down feature that reduces power consumption to 36 mW. The differential inputs provide a full-scale differential input swing equal to 2× VREF and support single-ended inputs. Full utilization of the differential inputs is recommended for optimal performance. The digital outputs of both ADCs are accessible via a single multiplexed 12-bit bus or separate buses. Duty cycle stabilization and output data format are selectable via tri-state function pins; output data can be configured as offset binary or two's complement. To facilitate interfacing with low-voltage systems, the digital output driver supply pin of the ADC12DL040 can be connected to a separate supply voltage ranging from +2.4V to the analog supply voltage. The device is available in a 64-pin TQFP package and operates over the industrial temperature range of -40°C to +85°C.
Applications
- Ultrasound and imaging
- Instrumentation
- Communications receivers
- xDSL
- Cable modems
- DSP front-end
C701599 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
Alternative Parts
| MPN | Manufacturer | Packaging | Availability | Unit Price | ||
|---|---|---|---|---|---|---|
| ADS5232IPAG | TI | TQFP-64(10x10) | 3 | $ 60.6559 | ||
| ADS5231IPAGT | TI | TQFP-64(10x10) | 160 | $ 31.864 | ||
| ADC12D040CIVS/NOPB | TI | TQFP-64(10x10) | 2 | $ 35.3428 | ||
| ADC12DL040CIVS/NOPB | TI | TQFP-64(10x10) | 0 | $ 44.3342 | ||
| ADC12DL065CIVS/NOPB | TI | TQFP-64(10x10) | 0 | $ 38.2958 | ||
| ADS5231IPAG | TI | TQFP-64(10x10) | 0 | $ 60.3727 |

