ADI LTC2261CUJ-14#PBF
| Manufacturer | |
| MPN | LTC2261CUJ-14#PBF |
| LCSC Part # | C679746 |
| Packaging | QFN-40-EP(6x6) |
| Customer # | |
| Key Attributes | QFN-40-EP(6x6) Analog to Digital Converters (ADC) RoHS |
| Datasheet | ADI LTC2261CUJ-14#PBF |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC) | |
| Manufacturer | ADI | |
| Packaging | QFN-40-EP(6x6) | |
| Features | Programmable gain;Built-in reference source;Power-down mode | |
| DNL (LSB) | 0.3LSB | |
| ADC architecture | - |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC) | |
| Manufacturer | ADI | |
| Packaging | QFN-40-EP(6x6) |
| Type | Description | |
|---|---|---|
| Features | Programmable gain;Built-in reference source;Power-down mode | |
| DNL (LSB) | 0.3LSB | |
| ADC architecture | - |
Introduction
The LTC2261-14/LTC2260-14/LTC2259-14 are sampling 14-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 73.4dB SNR and 85dB spurious free dynamic range (SFDR). Ultralow jitter of 0.17psRMS allows undersampling of IF frequencies with excellent noise performance.
DC specs include ±1LSB INL (typical), ±0.3LSB DNL (typical) and no missing codes over temperature. The transition noise is a low 1.2LSBRMS.
The digital outputs can be either full-rate CMOS, doubledata rate CMOS, or double-data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8.
The ENC+ and ENC– inputs may be driven differentially or single ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.
Features
- 73.4dB SNR
- 85dB SFDR
- Low Power: 127mW/106mW/89mW
- Single 1.8V Supply
- CMOS, DDR CMOS or DDR LVDS Outputs
- Selectable Input Ranges: 1VP-P to 2VP-P
- 800MHz Full-Power Bandwidth S/H
- Optional Data Output Randomizer
- Optional Clock Duty Cycle Stabilizer
- Shutdown and Nap Modes
- Serial SPI Port for Configuration
- Pin Compatible 14-Bit and 12-Bit Versions
- 40-Pin (6mmx6mm) QFN Package
Applications
- Communications
- Cellular Base Stations
- Software Defined Radios
- Portable Medical Imaging
- Multi-Channel Data Acquisition
- Nondestructive Testing
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 184.4385 | $ 184.44 |
| 200+ | $ 71.3763 | $ 14275.26 |
| 500+ | $ 68.8666 | $ 34433.30 |
| 1,000+ | $ 67.6272 | $ 67627.20 |
Standard Packaging61/Full Tube | ||
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC) | |
| Manufacturer | ADI | |
| Packaging | QFN-40-EP(6x6) | |
| Features | Programmable gain;Built-in reference source;Power-down mode | |
| DNL (LSB) | 0.3LSB | |
| ADC architecture | - |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC) | |
| Manufacturer | ADI | |
| Packaging | QFN-40-EP(6x6) |
| Type | Description | |
|---|---|---|
| Features | Programmable gain;Built-in reference source;Power-down mode | |
| DNL (LSB) | 0.3LSB | |
| ADC architecture | - |
Introduction
The LTC2261-14/LTC2260-14/LTC2259-14 are sampling 14-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 73.4dB SNR and 85dB spurious free dynamic range (SFDR). Ultralow jitter of 0.17psRMS allows undersampling of IF frequencies with excellent noise performance.
DC specs include ±1LSB INL (typical), ±0.3LSB DNL (typical) and no missing codes over temperature. The transition noise is a low 1.2LSBRMS.
The digital outputs can be either full-rate CMOS, doubledata rate CMOS, or double-data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8.
The ENC+ and ENC– inputs may be driven differentially or single ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.
Features
- 73.4dB SNR
- 85dB SFDR
- Low Power: 127mW/106mW/89mW
- Single 1.8V Supply
- CMOS, DDR CMOS or DDR LVDS Outputs
- Selectable Input Ranges: 1VP-P to 2VP-P
- 800MHz Full-Power Bandwidth S/H
- Optional Data Output Randomizer
- Optional Clock Duty Cycle Stabilizer
- Shutdown and Nap Modes
- Serial SPI Port for Configuration
- Pin Compatible 14-Bit and 12-Bit Versions
- 40-Pin (6mmx6mm) QFN Package
Applications
- Communications
- Cellular Base Stations
- Software Defined Radios
- Portable Medical Imaging
- Multi-Channel Data Acquisition
- Nondestructive Testing
C679746 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991C3 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991C3 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |