ADI AD5372BSTZ-REEL

The AD5372/AD5373 integrate 32 16/14-bit DACs in 64-lead LQFP and LFCSP packages, providing a nominal buffered voltage output range of 4× the reference voltage. The gain and offset of each DAC can be independently adjusted to eliminate errors. For greater flexibility, the DACs are organized into 4 groups of 8 DACs each. Two offset DACs are used to adjust the output range of each group. Group 0 is adjusted via offset DAC 0, while Groups 1 through 3 are adjusted via offset DAC 1. The AD5372/AD5373 are designed to operate reliably over a wide supply voltage range: VSS from −16.5 V to −4.5 V, and VDD from 9 V to 16.5 V. The output amplifier requires a headroom of 1.4 V at a load current of 1 mA. The AD5372/AD5373 feature a high-speed serial interface compatible with SPI, QSPI, MICROWIRE, and DSP interface standards, capable of handling clock speeds up to 50 MHz. DAC registers are updated upon receipt of new data. All outputs can be updated simultaneously by pulling the LDAC input low. Each channel has programmable gain and offset adjustment registers. Each DAC output is amplified and buffered on-chip relative to the external SIGGNDx input. DAC outputs can also be switched to SIGGNDx via the CLR pin.

• 32-channel DAC in 64-lead LQFP and 64-lead LFCSP packages
• Guaranteed 16/14-bit monotonicity
• Maximum output voltage range: ±4 × VREF (20 V)
• Nominal output voltage range: -4 V to +8 V
• Multiple independent output voltage ranges available
• System calibration with user-programmable offset and gain
• Channel grouping and addressing
• Thermal shutdown
• DSP/microcontroller-compatible serial interface
• SPI serial interface
• 2.5 V to 5.5 V JEDEC-compatible logic levels
• Digital reset (RESET)
• Clear-to-user-defined SIGGNDx clear function
• Synchronous DAC output update

• Level setting for automatic test equipment (ATE)
• Variable optical attenuator (VOA)
• Optical switches
• Industrial control systems
• Instrumentation