onsemi MC100EP31D
| Manufacturer | |
| MPN | MC100EP31D |
| LCSC Part # | C3826344 |
| Packaging | SOIC-8 |
| Customer # | |
| Key Attributes | 3V~5.5V 1 1 340ps SOIC-8 Flip Flops |
| Datasheet | onsemi MC100EP31D |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | onsemi | |
| Packaging | SOIC-8 | |
| Voltage - Supply | 3V~5.5V | |
| Number of Bits per Element | 1 | |
| Output Type | Complementary | |
| Operating Temperature | -40℃~+85℃ | |
| Series | 100EP Series | |
| Synchronous/Asynchronous | Asynchronous | |
| Current - Output High(IOH) | - | |
| Number of Elements | 1 | |
| Current - Output Low(IOL) | - | |
| Quiescent Current | - | |
| Setup Time | 100ps | |
| Hold Time | 150ps | |
| Propagation Delay | 340ps | |
| Trigger Type | Rising Edge |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | onsemi | |
| Packaging | SOIC-8 | |
| Voltage - Supply | 3V~5.5V | |
| Number of Bits per Element | 1 | |
| Output Type | Complementary | |
| Operating Temperature | -40℃~+85℃ | |
| Series | 100EP Series | |
| Synchronous/Asynchronous | Asynchronous |
| Type | Description | |
|---|---|---|
| Current - Output High(IOH) | - | |
| Number of Elements | 1 | |
| Current - Output Low(IOL) | - | |
| Quiescent Current | - | |
| Setup Time | 100ps | |
| Hold Time | 150ps | |
| Propagation Delay | 340ps | |
| Trigger Type | Rising Edge |
Introduction
The MC10/100EP31 is a D flip-flop with set and reset functionality. This device is pin and function compatible with the EL31 and LVEL31 devices. Because the AC performance of the EP31 is significantly faster than the EL31 and LVEL31 devices, the EP31 is ideally suited for applications requiring the fastest AC performance. Both the set and reset inputs are asynchronous, level-triggered signals. Data enters the master section of the flip-flop when CLK is low, and is transferred to the slave section on the positive transition of CLK, thereby appearing at the output.
Features
- 100 series with temperature compensation.
- Typical propagation delay: 340 ps.
- Typical maximum frequency >3 GHz.
- PECL mode operating range: VCC = 3.0 V to 5.5 V, VEE = 0 V.
- NECL mode operating range: VCC = 0 V, VEE = -3.0 V to -5.5 V.
- Open input default state.
- Q output defaults low when input is open or at VEE.
- Available in lead-free packages.
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | onsemi | |
| Packaging | SOIC-8 | |
| Voltage - Supply | 3V~5.5V | |
| Number of Bits per Element | 1 | |
| Output Type | Complementary | |
| Operating Temperature | -40℃~+85℃ | |
| Series | 100EP Series | |
| Synchronous/Asynchronous | Asynchronous | |
| Current - Output High(IOH) | - | |
| Number of Elements | 1 | |
| Current - Output Low(IOL) | - | |
| Quiescent Current | - | |
| Setup Time | 100ps | |
| Hold Time | 150ps | |
| Propagation Delay | 340ps | |
| Trigger Type | Rising Edge |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Flip Flops | |
| Manufacturer | onsemi | |
| Packaging | SOIC-8 | |
| Voltage - Supply | 3V~5.5V | |
| Number of Bits per Element | 1 | |
| Output Type | Complementary | |
| Operating Temperature | -40℃~+85℃ | |
| Series | 100EP Series | |
| Synchronous/Asynchronous | Asynchronous |
| Type | Description | |
|---|---|---|
| Current - Output High(IOH) | - | |
| Number of Elements | 1 | |
| Current - Output Low(IOL) | - | |
| Quiescent Current | - | |
| Setup Time | 100ps | |
| Hold Time | 150ps | |
| Propagation Delay | 340ps | |
| Trigger Type | Rising Edge |
Introduction
The MC10/100EP31 is a D flip-flop with set and reset functionality. This device is pin and function compatible with the EL31 and LVEL31 devices. Because the AC performance of the EP31 is significantly faster than the EL31 and LVEL31 devices, the EP31 is ideally suited for applications requiring the fastest AC performance. Both the set and reset inputs are asynchronous, level-triggered signals. Data enters the master section of the flip-flop when CLK is low, and is transferred to the slave section on the positive transition of CLK, thereby appearing at the output.
Features
- 100 series with temperature compensation.
- Typical propagation delay: 340 ps.
- Typical maximum frequency >3 GHz.
- PECL mode operating range: VCC = 3.0 V to 5.5 V, VEE = 0 V.
- NECL mode operating range: VCC = 0 V, VEE = -3.0 V to -5.5 V.
- Open input default state.
- Q output defaults low when input is open or at VEE.
- Available in lead-free packages.
C3826344 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |