ADI AD532SE/883B

The AD532 is the first pretrimmed single chip monolithic multiplier/divider. It guarantees a maximum multiplying error of ±1.0% and a ±10 V output voltage without the need for any external trimming resistors or output op amp. Because the AD532 is internally trimmed, its simplicity of use provides design engineers with an attractive alternative to modular multipliers, and its monolithic construction provides significant advantages in size, reliability and economy. Further, the AD532 can be used as a direct replacement for other IC multipliers that require external trim networks.

• The AD532 multiplies in four quadrants with a transfer function of (X₁ - X₂)(Y₁ - Y₂)/10 V, divides in two quadrants with a 10 V Z/(X₁ - X₂) transfer function, and square roots in one quadrant with a transfer function of ±√(10 V Z).
• The differential X and Y inputs provide significant operating flexibility both for algebraic computation and transducer instrumentation applications. Transfer functions, such as XY/10 V, (X² - Y²)/10 V, ±X²/10 V, and 10 V Z/(X₁ - X₂), are easily attained and are extremely useful in many modulation and function generation applications.
• The high CMRR (75 dB) of the differential inputs makes the AD532 especially well qualified for instrumentation applications.
• The AD532J and AD532K are specified for maximum multiplying errors of ±2% and ±1% of full scale, respectively at 25°C, and are rated for operation from 0°C to 70°C. The AD532S has a maximum multiplying error of ±1% of full scale at 25°C; it is also 100% tested to guarantee a maximum error of ±4% at the extended operating temperature limits of -55°C and +125°C.
• All devices are available in either the hermetically-sealed TO100 metal can, TO - 116 ceramic DIP or LCC packages. The J, K, and S grade chips are also available.
• True ratiometric trim for improved power supply rejection.
• Reduced power requirements since no networks across supplies are required.
• More reliable because standard monolithic assembly techniques can be used rather than more complex hybrid approaches.
• High impedance X and Y inputs with negligible circuit loading.
• Differential X and Y inputs for noise rejection and additional computational flexibility.

• Multiplication, division, squaring, square rooting
• Algebraic computation
• Power measurements
• Instrumentation applications
• Available in chip form