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Rochester Electronics TN80C186EB-20 product image
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Rochester Electronics TN80C186EB-20

Manufacturer
MPN
TN80C186EB-20
LCSC Part #
C3231865
Packaging
-
Customer #
Key Attributes
Others Microcontrollers
DatasheetRochester Electronics TN80C186EB-20
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200+$ 79.9738$ 15994.76
500+$ 77.1641$ 38582.05
1,000+$ 75.7754$ 75775.40
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Embedded/Microcontrollers
ManufacturerRochester Electronics
Packaging-
CPU CoreOthers

Introduction

AI Translation

The 80C186EB is a second generation CHMOS High-Integration microprocessor. It has features that are new to the 80C186 family and include a STATIC CPU core, an enhanced Chip Select decode unit, two independent Serial Channels, I/O ports, and the capability of Idle or Powerdown low power modes. The 80C186EB is the first product in a new generation of low-power high-integration microprocessors. It enhances the existing 186 family by offering new features and new operating modes. The 80C186EB is object code compatible with the 80C186XL, 80C188XL microprocessors. The 80L186EB is the 3V version of the 80C186EB. The 80L186EB is functionally identical to the 80C186EB embedded processor. Current 80C186EB users can easily upgrade their designs to use the 80L186EB and benefit from the reduced power consumption inherent in 3V operation. The feature set of the 80C186EB meets the needs of low power, space critical applications. Low-Power applications benefit from the static design of the CPU core and the integrated peripherals, as well as low voltage operation. Minimum current consumption is achieved by providing a Powerdown mode that halts operation of the device and freezes the clock circuits. Peripheral design enhancements ensure that non-initialized peripherals consume little current. Space critical applications benefit from the integration of commonly used system peripherals. Two serial channels are provided for services such as diagnostics, inter-processor communication, modem interface, terminal display interface, and many others. A flexible chip select unit simplifies memory and peripheral interfacing. The interrupt unit provides sources for up to 129 external interrupts and will prioritize these interru

Features

AI Translation
  • Integrated Feature Set
  • Low-Power Static CPU Core
  • Two Independent UARTs each with an Integral Baud Rate Generator
  • Two 8-Bit Multiplexed I/O Ports
  • Programmable Interrupt Controller
  • Three Programmable 16-Bit Timer Counters
  • Clock Generator
  • Ten Programmable Chip Selects with Integral Wait-State Generator
  • Memory Refresh Control Unit
  • System Level Testing Support (ONCE Mode)
  • Direct Addressing Capability to 1 Mbyte Memory and 64 Kbyte I/O
  • Speed Versions Available (5V): 25 MHz (80C186EB25, 80C188EB25), 20 MHz (80C186EB20, 80C188EB20), 13 MHz (80C186EB13, 80C188EB13)
  • Available in Extended Temperature Range (-40℃ to +85℃)
  • Speed Versions Available (3V): 16 MHz (80L186EB16, 80L188EB16), 13 MHz (80L186EB13, 80L188EB13)
  • Low-Power Operating Modes: Idle Mode Freezes CPU Clocks but keeps Peripherals Active, Powerdown Mode Freezes All Internal Clocks
  • Supports 80C187 Numeric Coprocessor Interface (80C186EB PLCC Only)
  • Available In: 80-Pin Quad Flat Pack (QFP), 84-Pin Plastic Leaded Chip Carrier (PLCC), 80-Pin Shrink Quad Flat Pack (SQFP)

Applications

AI Translation
  • Low-power applications
  • Space-critical applications
  • Diagnostics
  • Inter-processor communication
  • Modem interface
  • Terminal display interface