Infineon/CYPRESS PALC16L8L-35WC

Cypress PALC20 series devices are high-speed, electrically programmable, UV-erasable logic devices fabricated using a proprietary N-well CMOS EPROM process. These devices employ a sum-of-products (AND-OR) architecture, enabling users to program custom logic functions tailored to specific requirements. PAL devices are available in 20-pin plastic and ceramic DIP, plastic SOJ, and ceramic LCC packages. Ceramic packages are optionally available with an erase window; when exposed to UV light, the PAL is erased and can be reprogrammed. Prior to programming, AND gates or product terms are connected to the true and complement forms of input signals through EPROM cells. Programming an EPROM cell disconnects the input term from the product term. By selectively programming these cells, specific logic functions can be implemented in PALC devices. PALC devices are offered in four functional configurations: 16R8, 16R6, 16R4, and 16L8. These devices support up to 16 inputs and 8 outputs. The product family provides, through four functional variants, configurations of 8 registered outputs, 8 combinatorial outputs, 6 registered outputs with 2 combinatorial outputs, and 4 registered outputs with 4 combinatorial outputs. All combinatorial outputs of the 16R4 and 16R6, and 6 combinatorial outputs of the 16L8, can be used as optional inputs. All registered outputs feed back the complemented Q output of the register to the main array. Registers automatically initialize at power-up to Q output low and Q complement output high. All unused inputs should be tied to ground. All PALC devices incorporate a security feature that protects the implementation of proprietary user logic. Once enabled, the contents of the normal array can no longer be accessed in verify mode. Since EPROM technology is used as the storage mechanism, array contents are not visible under a microscope. Cypress PALC products are manufactured using advanced 1.2-micron N-well CMOS EPROM technology. The use of this proven EPROM technology is fundamental to delivering superior products, with inherent advantages in reliability, testability, programming, and functional yield. The inherent advantage of EPROM technology is that all programmable elements can be programmed, tested, and erased during the manufacturing process. This also enables 100% functional testing of devices during manufacturing. The ability to preload registered devices during test operations makes testing easier and more efficient. Combined with these inherent and design characteristics, exceptional functionality, programmability, and guaranteed AC performance are achieved, making testing a straightforward task. The register preload feature allows users to initialize registered devices to a known state prior to testing, significantly simplifying and shortening the test process.

• CMOS EPROM technology, reprogrammable
• High performance at one-quarter power consumption: propagation delay tpD = 25 ns, setup time ts = 20 ns, clock-to-output delay tco = 15 ns, supply current Icc = 45 mA
• High-temperature performance: propagation delay tpD = 20 ns, setup time ts = 20 ns, clock-to-output delay tco = 15 ns, supply current Icc = 70 mA
• High reliability
• Proven EPROM technology
• ESD protection voltage >1500V
• 100% AC and DC tested
• Supply voltage tolerance ±10%
• High noise immunity
• Security features prevent pattern copying
• 100% programming and functional testing