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TI TLC3578IPW

Manufacturer
MPN
TLC3578IPW
LCSC Part #
C1542696
Packaging
TSSOP-24
Customer #
Key Attributes
SPI 5V~5.5V TSSOP-24 Analog to Digital Converters (ADC) RoHS
DatasheetTI TLC3578IPW
RoHS Compliance1 documents available
Alternative Parts3
Every Order Guarantee
100% Authentic · 30-Day Return or Replacement

Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Data Acquisition/Analog to Digital Converters (ADC)
ManufacturerTI
PackagingTSSOP-24
Operating Temperature-40℃~+85℃
InterfaceSPI
Quiescent Current (Iq)20uA
Voltage - Supply5V~5.5V
Number of Channels8
Integral non - linearity1LSB
Voltage ReferenceExternal
Clock/OscillatorBuilt-in;External
Clock Frequency-
FeaturesBipolar input;Multiplexers;FIFO buffer
Resolution(Bits)200kHz;14
S/N Ratio80dB
DNL (LSB)-
ADC architecture-
Programmable GainNot supported

Introduction

AI Translation

The TLC3574, TLC3578, TLC2574, and TLC2578 are a family of high-performance, low-power, CMOS analog-to-digital converters (ADC). TLC3574/78 is a 14-bit ADC; TLC2574/78 is a 12-bit ADC. All parts operate from single 5-V analog power supply and 3-V to 5-V digital supply. The serial interface consists of four digital input [chip select (CS), frame sync (FS), serial input-output clock (SCLK), serial data input (SDI)], and a 3-state serial data output (SDO). CS (works as SS, slave select), SDI, SDO and SCLK form an SPI interface. FS, SDI, SDO, and SCLK form DSP interface. The frame sync signal (FS) indicates the start of a serial data frame being transferred. When multiple converters connect to one serial port of a DSP, CS works as the chip select to allow the host DSP to access the individual converter. CS can be tied to ground if only one converter is used. FS must be tied to DVDD if it is not used (such as in an SPI interface). When SDI is tied to DVDD, the device is set in hardware default mode after power on and no software configuration is required. In the simplest case, only three wires (SDO, SCLK, and CS or FS) are needed to interface with the host.

In addition to being a high-speed ADC with versatile control capability, these devices have an on-chip analog multiplexer (MUX) that can select any analog input or one of three self-test voltages. The sample-and-hold function is automatically started after the fourth SCLK (normal sampling) or can be controlled by a special pin, CSTART, to extend the sampling period (extended sampling). The normal sampling period can also be programmed as short sampling (12 SCLKs) or long sampling (44 SCLKs) to accommodate the faster SCLK operation popular among high-performance signal processors. The TLC3574/78 and TLC2574/78 are designed to operate with low-power consumption. The power saving feature is further enhanced with autopower-down mode and programmable conversion speeds. The conversion clock (internal OSC) is built in. The converter can also use an external SCLK as the conversion clock for maximum flexibility. The TLC3574/78 and TLC2574/78 are specified with bipolar input and a full scale range of ±10 V.