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AMD/XILINX XCR3032XL-7CSG48C product image
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AMD/XILINX XCR3032XL-7CSG48C

Manufacturer
MPN
XCR3032XL-7CSG48C
LCSC Part #
C1521385
Packaging
CSBGA-48
Customer #
Key Attributes
CSBGA-48 FPGAs (Field Programmable Gate Array)
DatasheetAMD/XILINX XCR3032XL-7CSG48C
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QtyUnit Price(Reference Only)Total Amount
1+$ 5.893$ 5.89
200+$ 2.2813$ 456.26
416+$ 2.201$ 915.62
832+$ 2.1609$ 1797.87
Standard Packaging416/Full Tray
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Products Specifications

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Introduction

AI Translation

The CoolRunner XPLA3 XCR3032XL device is a 3.3V CPLD with 32 macrocells, suitable for designs that are power-sensitive and require cutting-edge programmable logic solutions. A total of two function blocks provide 750 available gates. The fastest pin-to-pin propagation delay can reach 4.5 ns, and the maximum system frequency is 213 MHz.

Features

AI Translation
  • Low-power 3.3V, 32-macrocell CPLD
  • 4.5 ns pin-to-pin logic delay
  • System frequency up to 213 MHz
  • 32 macrocells, 750 usable gates
  • Small form factor packages: 48-ball CS BGA (36 user I/O pins), 44-pin VQFP (36 user I/O)
  • Optimized for 3.3V systems
  • Ultra-low power operation
  • Typical standby current of 17 μA at 25°C
  • 3.3V core supply with 5V-tolerant I/O pins
  • Advanced 0.35-micron five-layer metal EEPROM process
  • Fast Zero-Power (FZP) CMOS technology
  • 3.3V PCI electrical specification compatible outputs (no internal clamp diodes on any input or I/O, no minimum clock input capacitance)
  • In-system programmable
  • Input registers
  • Predictable timing model
  • Up to 23 available clocks per function block
  • Pin-locking on design changes
  • Fully compliant with IEEE Standard 1149.1 boundary scan (JTAG)
  • Four global clocks
  • Eight product term control terms per function block
  • JTAG ISP pins with dual-function port enable pin
  • Supply voltage 2.7V to 3.6V over industrial temperature range
  • Per-macrocell programmable slew rate control
  • Security bit to prevent unauthorized access