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ADI LTC4315IDE#PBF

Hersteller
ADI
Herst.-Teilenr.
LTC4315IDE#PBF
LCSC-Nr.
C688139
Verp.
DFN-12-EP(3x4)
Kundennummer
Hauptmerkm.
2-Wire Bus Buffer with High Noise Margin
DatenblattADI LTC4315IDE#PBF
RoHS-Konformität1 Dokumente verfügbar
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Minimum: 1Vielfaches: 1Verkaufseinheit: Piece
Zur BOM-Liste hinzufügen
Stk.E-Preis(Nur als Referenz)Gesamtbetrag
1+$ 3.2839$ 3.28
10+$ 2.8104$ 28.10
30+$ 2.5281$ 75.84
100+$ 2.2443$ 224.43
500+$ 2.1132$ 1056.60
1,000+$ 2.053$ 2053.00
Standardgehäuse91/Full Tube
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$

Produktspezifikationen

Alle
TypBeschreibung
KategorieIntegrated Circuits (ICs)/Interface/Signal Buffers, Repeaters, Splitters
HerstellerADI
Verp.DFN-12-EP(3x4)
TypeBuffer
Voltage - Supply2.9V~5.5V
Input type-
Number of Channels2
Input Capacitance10pF
Output Type-
Delay Time250ns
FeaturesBus capacitance isolation;Level shifting;Hot-swap protection;Cascade and address expansion;Edge rate control
Operating Temperature-40℃~+85℃
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Beschreibung

KI-Übersetzung

The LTC4315 is a hot-swappable 2-wire bus buffer that provides bidirectional buffering, while maintaining a low offset voltage and high noise margin up to 0.3 - VCC. The high noise margin allows the LTC4315 to be interoperable with devices that drive a high VOL (> 0.4V) and allows multiple LTC4315s to be cascaded. The LTC4315 supports level translation between 1.5V, 1.8V, 2.5V, 3.3V and 5V busses. During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. Connection is established between the input and output after ENABLE is asserted high and a stop bit or bus idle condition has been detected on the SDA and SCL pins. If both data and clock are not simultaneously high at least once in 45ms and DISCEN is high, a FAULT signal is generated indicating a stuck bus low condition and the input is disconnected from the output. Up to 16 clock pulses are subsequently generated to free the stuck bus. A three state ACC pin enables input and output side rise time accelerators of various strengths.

Merkmale

KI-Übersetzung
  • Bidirectional Buffer Increases Fanout
  • High Noise Margin with VIL = 0.3 - VCC
  • Compatible with Non-Compliant I2C Devices That Drive a High VOL
  • Selectable Rise Time Accelerator Current
  • Level Shift 1.5V, 1.8V, 2.5V, 3.3V and 5V Busses
  • Prevents SDA and SCL Corruption During Live Board Insertion and Removal from Backplane
  • Stuck Bus Disconnect and Recovery
  • Compatible with I2C, I2C Fast Mode and SMBus
  • ±4KV Human Body Model ESD Ruggedness
  • High Impedance SDA, SCL pins When Unpowered
  • 12-Lead (4mm × 3mm) DFN and 12-Lead MSOP Packages

Anwendungen

KI-Übersetzung
  • Capacitance Buffers/Bus Extender
  • Live Board Insertion
  • Telecommunications Systems Including ATCA
  • Level Translation
  • PMBus
  • Servers