MICROCHIP AT91SAM9G10-EK2
| Hersteller | |
| Herst.-Teilenr. | AT91SAM9G10-EK2 |
| LCSC-Nr. | C610836 |
| Verp. | - |
| Kundennummer | |
| Hauptmerkm. | ARM926EJ-S 32 Bit Embedded MCU, DSP Evaluation Boards RoHS |
| Datenblatt | MICROCHIP AT91SAM9G10-EK2 |
| RoHS-Konformität | 1 Dokumente verfügbar |
Produktspezifikationen
Alle
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Development Boards, Kits, Programmers/Evaluation Boards/Embedded MCU, DSP Evaluation Boards | |
| Hersteller | MICROCHIP | |
| Verp. | - | |
| CPU Core | ARM926EJ-S | |
| Number of I/O | 96 | |
| Core Size | 32 Bit |
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Development Boards, Kits, Programmers/Evaluation Boards/Embedded MCU, DSP Evaluation Boards | |
| Hersteller | MICROCHIP | |
| Verp. | - |
| Typ | Beschreibung | |
|---|---|---|
| CPU Core | ARM926EJ-S | |
| Number of I/O | 96 | |
| Core Size | 32 Bit |
Hilfe & FeedbackÄhnliche Produkte anzeigen (0) >
Beschreibung
KI-Übersetzung
The AT91SAM9G10-EK evaluation kit is an effective platform for evaluating chip performance and developing code for applications based on the AT91SAM9G10.
Merkmale
KI-Übersetzung
- Incorporates the ARM926EJ-S ARM Thumb Processor
- DSP Instruction Extensions
- ARM Jazelle Technology for Java Acceleration
- 16-KByte Data Cache, 16-KByte Instruction Cache, Write Buffer
- 266 MHz core frequency
- Memory Management Unit
- EmbeddedICE In-circuit Emulation, Debug Communication Channel Support
- Mid-level implementation Embedded Trace Macrocell
- Additional Embedded Memories: 32K Bytes of Internal ROM, Single-cycle Access at Maximum Bus Speed; 160K Bytes of Internal SRAM, Single-cycle Access at Maximum Processor or Bus Speed
- External Bus Interface (EBI): Supports SDRAM, Static Memory, NAND Flash and CompactFlash
- LCD Controller: RGB Addressing; Supports Passive or Active Displays; Up to 16-bits per Pixel in STN Color Mode; Up to 16M Colors in TFT Mode (24-bit per Pixel), Resolution up to 2048 x 2048
- USB: USB 2.0 Full Speed (12 Mbits per second) Host Double Port Dual On-chip Transceivers Integrated FIFOs and Dedicated DMA Channels; USB 2.0 Full Speed (12 Mbits per second) Device Port On-chip Transceiver, 2-Kbyte Configurable Integrated FIFOs
- Bus Matrix: Handles Five Masters and Five Slaves; Boot Mode Select Option; Remap Command
- Fully Featured System Controller (SYSC) for Efficient System Management, including: Reset Controller, Shutdown Controller, Four 32-bit Battery Backup Registers for a Total of 16 Bytes
- Clock Generator and Power Management Controller
- Advanced Interrupt Controller and Debug Unit
- Periodic Interval Timer, Watchdog Timer and Real-time Timer
- Three 32-bit PIO Controllers
Nicht vorrätig
Benachrichtigen
Minimum: 1Vielfaches: 1Verkaufseinheit: Piece
Zur BOM-Liste hinzufügen
| Stk. | E-Preis(Nur als Referenz) | Gesamtbetrag |
|---|---|---|
| 1+ | $ 1112.9819 | $ 1112.98 |
| 30+ | $ 1057.0529 | $ 31711.59 |
Standardgehäuse1/Full Bag | ||
Besserer Preis bei größerer Menge?
$
Produktspezifikationen
Alle
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Development Boards, Kits, Programmers/Evaluation Boards/Embedded MCU, DSP Evaluation Boards | |
| Hersteller | MICROCHIP | |
| Verp. | - | |
| CPU Core | ARM926EJ-S | |
| Number of I/O | 96 | |
| Core Size | 32 Bit |
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Development Boards, Kits, Programmers/Evaluation Boards/Embedded MCU, DSP Evaluation Boards | |
| Hersteller | MICROCHIP | |
| Verp. | - |
| Typ | Beschreibung | |
|---|---|---|
| CPU Core | ARM926EJ-S | |
| Number of I/O | 96 | |
| Core Size | 32 Bit |
Hilfe & FeedbackÄhnliche Produkte anzeigen (0) >
Beschreibung
KI-Übersetzung
The AT91SAM9G10-EK evaluation kit is an effective platform for evaluating chip performance and developing code for applications based on the AT91SAM9G10.
Merkmale
KI-Übersetzung
- Incorporates the ARM926EJ-S ARM Thumb Processor
- DSP Instruction Extensions
- ARM Jazelle Technology for Java Acceleration
- 16-KByte Data Cache, 16-KByte Instruction Cache, Write Buffer
- 266 MHz core frequency
- Memory Management Unit
- EmbeddedICE In-circuit Emulation, Debug Communication Channel Support
- Mid-level implementation Embedded Trace Macrocell
- Additional Embedded Memories: 32K Bytes of Internal ROM, Single-cycle Access at Maximum Bus Speed; 160K Bytes of Internal SRAM, Single-cycle Access at Maximum Processor or Bus Speed
- External Bus Interface (EBI): Supports SDRAM, Static Memory, NAND Flash and CompactFlash
- LCD Controller: RGB Addressing; Supports Passive or Active Displays; Up to 16-bits per Pixel in STN Color Mode; Up to 16M Colors in TFT Mode (24-bit per Pixel), Resolution up to 2048 x 2048
- USB: USB 2.0 Full Speed (12 Mbits per second) Host Double Port Dual On-chip Transceivers Integrated FIFOs and Dedicated DMA Channels; USB 2.0 Full Speed (12 Mbits per second) Device Port On-chip Transceiver, 2-Kbyte Configurable Integrated FIFOs
- Bus Matrix: Handles Five Masters and Five Slaves; Boot Mode Select Option; Remap Command
- Fully Featured System Controller (SYSC) for Efficient System Management, including: Reset Controller, Shutdown Controller, Four 32-bit Battery Backup Registers for a Total of 16 Bytes
- Clock Generator and Power Management Controller
- Advanced Interrupt Controller and Debug Unit
- Periodic Interval Timer, Watchdog Timer and Real-time Timer
- Three 32-bit PIO Controllers
Compliance & Exportcodes
| Typ | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Typ | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Typ | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |

