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EDA-ModelleEasyEDA
micron MT25QL02GCBB8E12-0AUT TR
| Hersteller | |
| Herst.-Teilenr. | MT25QL02GCBB8E12-0AUT TR |
| LCSC-Nr. | C5813018 |
| Verp. | TPBGA-24(6x8) |
| Kundennummer | |
| Hauptmerkm. | 2Gbit 2.7V~3.6V 133MHz SPI TPBGA-24(6x8) Memory RoHS |
| Datenblatt | micron MT25QL02GCBB8E12-0AUT TR |
| RoHS-Konformität | 1 Dokumente verfügbar |
| Alternativteile | 5 |
Produktspezifikationen
Alle
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Memory/Memory | |
| Hersteller | micron | |
| Verp. | TPBGA-24(6x8) | |
| Operating Temperature | -40℃~+125℃ | |
| Features | Write enable latch;Power-on reset;Hardware write protection;Software write protection;Absolute write protection | |
| Memory Size | 2Gbit | |
| Voltage - Supply | 2.7V~3.6V | |
| Program / Erase Cycles | 100,000 cycles | |
| Clock Frequency | 133MHz | |
| Data Retention - TDR (Year) | 20 Years | |
| Block Erase Time(tBE) | - | |
| Write Cycle Time(tWC) | - | |
| Page Programming Time (Tpp) | 1.8ms | |
| Standby Supply Current | 90uA | |
| Interface | SPI |
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Memory/Memory | |
| Hersteller | micron | |
| Verp. | TPBGA-24(6x8) | |
| Operating Temperature | -40℃~+125℃ | |
| Features | Write enable latch;Power-on reset;Hardware write protection;Software write protection;Absolute write protection | |
| Memory Size | 2Gbit | |
| Voltage - Supply | 2.7V~3.6V | |
| Program / Erase Cycles | 100,000 cycles |
| Typ | Beschreibung | |
|---|---|---|
| Clock Frequency | 133MHz | |
| Data Retention - TDR (Year) | 20 Years | |
| Block Erase Time(tBE) | - | |
| Write Cycle Time(tWC) | - | |
| Page Programming Time (Tpp) | 1.8ms | |
| Standby Supply Current | 90uA | |
| Interface | SPI |
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Merkmale
KI-Übersetzung
- Stacked device (four 512Mb die)
- SPI-compatible serial bus interface
- Single and double transfer rate (STR/DTR)
- Clock frequency: 133 MHz (MAX) for all protocols in STR; 90 MHz (MAX) for all protocols in DTR
- Dual/quad I/O commands for increased throughput up to 90 MB/s
- Supported protocols in both STR and DTR: Extended I/O protocol, Dual I/O protocol, Quad I/O protocol
- Execute-in-place (XIP)
- PROGRAM/ERASE SUSPEND operations
- Volatile and nonvolatile configuration settings
- Software reset
- Additional reset pin for selected part numbers
- 3-byte and 4-byte address modes: enable memory access beyond 128Mb
- Dedicated 64-byte OTP area outside main memory
- Readable and user-lockable
- Permanent lock with PROGRAM OTP command
- Erase capability: Die erase, Sector erase 64KB uniform granularity, Subsector erase 4KB, 32KB granularity
- Security and write protection: Volatile and nonvolatile locking and software write protection for each 64KB sector, Nonvolatile configuration locking, Password protection, Hardware write protection: nonvolatile bits (BP[3:0] and TB) define protected area size
- Program/erase protection during power-up
- CRC detects accidental changes to raw data
- Electronic signature: JEDEC-standard 3-byte signature (BA22h), Extended device ID: two additional bytes identify device factory options
- JESD47H-compliant
- Minimum 100,000 ERASE cycles per sector
- Data retention: 20 years (TYP)
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Minimum: 1Vielfaches: 1Verkaufseinheit: Piece
Zur BOM-Liste hinzufügen
| Stk. | E-Preis(Nur als Referenz) | Gesamtbetrag |
|---|---|---|
| 1+ | $ 87.1069 | $ 87.11 |
| 200+ | $ 34.7564 | $ 6951.28 |
| 500+ | $ 33.5957 | $ 16797.85 |
| 1,000+ | $ 33.0214 | $ 33021.40 |
Standardgehäuse2500/Full Reel | ||
Besserer Preis bei größerer Menge?
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Produktspezifikationen
Alle
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Memory/Memory | |
| Hersteller | micron | |
| Verp. | TPBGA-24(6x8) | |
| Operating Temperature | -40℃~+125℃ | |
| Features | Write enable latch;Power-on reset;Hardware write protection;Software write protection;Absolute write protection | |
| Memory Size | 2Gbit | |
| Voltage - Supply | 2.7V~3.6V | |
| Program / Erase Cycles | 100,000 cycles | |
| Clock Frequency | 133MHz | |
| Data Retention - TDR (Year) | 20 Years | |
| Block Erase Time(tBE) | - | |
| Write Cycle Time(tWC) | - | |
| Page Programming Time (Tpp) | 1.8ms | |
| Standby Supply Current | 90uA | |
| Interface | SPI |
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Memory/Memory | |
| Hersteller | micron | |
| Verp. | TPBGA-24(6x8) | |
| Operating Temperature | -40℃~+125℃ | |
| Features | Write enable latch;Power-on reset;Hardware write protection;Software write protection;Absolute write protection | |
| Memory Size | 2Gbit | |
| Voltage - Supply | 2.7V~3.6V | |
| Program / Erase Cycles | 100,000 cycles |
| Typ | Beschreibung | |
|---|---|---|
| Clock Frequency | 133MHz | |
| Data Retention - TDR (Year) | 20 Years | |
| Block Erase Time(tBE) | - | |
| Write Cycle Time(tWC) | - | |
| Page Programming Time (Tpp) | 1.8ms | |
| Standby Supply Current | 90uA | |
| Interface | SPI |
Hilfe & FeedbackÄhnliche Produkte anzeigen (0) >
Merkmale
KI-Übersetzung
- Stacked device (four 512Mb die)
- SPI-compatible serial bus interface
- Single and double transfer rate (STR/DTR)
- Clock frequency: 133 MHz (MAX) for all protocols in STR; 90 MHz (MAX) for all protocols in DTR
- Dual/quad I/O commands for increased throughput up to 90 MB/s
- Supported protocols in both STR and DTR: Extended I/O protocol, Dual I/O protocol, Quad I/O protocol
- Execute-in-place (XIP)
- PROGRAM/ERASE SUSPEND operations
- Volatile and nonvolatile configuration settings
- Software reset
- Additional reset pin for selected part numbers
- 3-byte and 4-byte address modes: enable memory access beyond 128Mb
- Dedicated 64-byte OTP area outside main memory
- Readable and user-lockable
- Permanent lock with PROGRAM OTP command
- Erase capability: Die erase, Sector erase 64KB uniform granularity, Subsector erase 4KB, 32KB granularity
- Security and write protection: Volatile and nonvolatile locking and software write protection for each 64KB sector, Nonvolatile configuration locking, Password protection, Hardware write protection: nonvolatile bits (BP[3:0] and TB) define protected area size
- Program/erase protection during power-up
- CRC detects accidental changes to raw data
- Electronic signature: JEDEC-standard 3-byte signature (BA22h), Extended device ID: two additional bytes identify device factory options
- JESD47H-compliant
- Minimum 100,000 ERASE cycles per sector
- Data retention: 20 years (TYP)
C5813018 EasyEDA-Bibliothek
Compliance & Exportcodes
| Typ | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991B1A |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Typ | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991B1A |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Typ | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
Alternativteile
| MPN | Hersteller | Verpackung | Verfügbarkeit | Stückpreis | ||
|---|---|---|---|---|---|---|
| MT25QL02GCBB8E12-0AUT | micron | TPBGA-24(6x8) | 0 | $ 47.644 | ||
| MT25QL02GCBB8E12-0AAT | micron | TPBGA-24(6x8) | 0 | $ 59.9803 | ||
| GD55B02GEBIRY | GigaDevice Semicon Beijing | TFBGA-24(6x8) | 0 | $ 43.2534 | ||
| MX66L2G45GXRI00 | MXIC | CSPBGA-24(6x8) | 0 | $ 25.0431 | ||
| S25HL02GTDPBHB050 | Infineon | BGA-24(6x8) | 0 | $ 70.5659 |