TI S5LS20216ASPGEQQ1

The TMS570LS series is a high-performance automotive-grade microcontroller family certified for use in IEC 61508 SIL3 safety systems. The safety architecture includes dual CPUs in lockstep, CPU and memory built-in self-test (BIST) logic, ECC on flash and data SRAM, parity on peripheral memory, and loopback functionality on peripheral IOs. The TMS570LS series integrates an ARM Cortex™-R4F floating-point CPU, which delivers an efficient 1.6 DMIPS/MHz and supports configurations running up to 160MHz, providing instruction throughput greater than 250 DMIPS. The TMS570LS series also offers various flash (1MB or 2MB) and data SRAM (128KB or 160KB) options with single-bit error correction and double-bit error detection. The TMS570LS features peripherals for real-time control applications, including up to 32 nHET timer channels and two 12-bit ADCs supporting up to 24 inputs each. Multiple communication interfaces are available, including a 2-channel FlexRay, 3 CAN controllers each supporting 64 mailboxes, and 2 LIN/UART controllers. With integrated SIL3-certified safety features and a broad selection of communication and control peripherals, the TMS570LS series is the ideal solution for high-performance real-time control applications with safety-critical requirements.

This device uses big-endian format, in which the most significant byte of a word is stored at the lowest-numbered byte address, and the least significant byte is stored at the highest-numbered byte address. Device memory includes general-purpose SRAM that supports single-cycle read/write access in byte, half-word, and word modes. The flash memory on this device is a non-volatile, electrically erasable and programmable memory with a 64-bit wide data bus interface. The flash operates on a 3.3V power supply (the same level as the I/O supply) for all read, program, and erase operations. In pipeline mode, the flash can operate at system clock frequencies up to 160MHz. This device has 9 communication interfaces: 3 MibSPI, 2 LIN/SCI, 3 DCAN, and 1 optional FlexRay™ controller. SPI provides a convenient serial interaction method for high-speed communication between similar shift-register-type devices. LIN supports the Local Interconnect standard 2.0 and can be used as a full-duplex UART using standard non-return-to-zero (NRZ) format. DCAN supports the CAN 2.0B protocol standard and uses a serial, multi-master communication protocol that effectively supports distributed real-time control with robust communication at rates up to 1 Mbps. DCAN is well-suited for applications in noisy and harsh environments (e.g., automotive and industrial), where reliable serial communication or multiplexed wiring is required. FlexRay uses a dual-channel serial, fixed time-base multi-master communication protocol with a communication rate of 10 Mbps per channel. A FlexRay Transfer Unit (FTU) enables anonymous transfer and retrieval of FlexRay data to and from the main CPU memory. Data transfers are protected by a dedicated, built-in memory protection unit (MPU). NHET is an advanced intelligent timer that provides precise timing functions for real-time applications. The timer is software-controlled, employs a reduced instruction set, and features a dedicated timer micro-machine with an associated I/O port. NHET can be used for PWM output, capture or compare inputs, or general-purpose I/O. It is particularly suited for applications requiring multiple sensor inputs, actuator driving, and complex, accurate time pulses. A High-End Timer Transfer Unit (HET-TU) provides the capability to transfer NHET data to and from main memory. An MPU is built into the HET-TU to prevent erroneous transfers. This device has 2 MibADCs with 12-bit resolution, each with a total of 24 channels and a buffer RAM protected by 64-word parity. MibADC channels can be converted independently or grouped by software for sequential conversion sequences. The 2 ADCs share 8 channels. There are 3 independent groups, 2 of which are triggered by an external event. Each sequence can perform a single conversion when triggered or be configured for continuous conversion mode. The FMzPLL clock module contains a phase-locked loop, a clock monitor circuit, a clock enable circuit, and a pre-divider. The FMzPLL multiplies an external frequency reference to a higher frequency for internal use. The FMzPLL provides one of 6 possible clock source inputs to the Global Clock Module (GCM). The GCM supplies the system clock (HCLK), real-time interrupt clock (RTICLK1), CPU clock (GCLK), NHET clock (VCLK2), DCAN clock (AVCLK1), and peripheral interface clock (VCLK) to all other peripheral modules. The device also includes an External Clock Pre-divider (ECP) module, which, when enabled, outputs a continuous external clock on the ECLK pin. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. The DMA controller has 32 DMA requests, 16 channels/control data packets, and parity protection for its memory. The DMA provides memory-to-memory transfer capability without CPU involvement. A built-in MPU within the DMA prevents erroneous memory transfers. The Error Signaling Module (ESM) monitors all device errors and determines whether to trigger an interrupt or assert an external error pin upon fault detection. The External Memory Interface (EMIF) provides memory expansion to asynchronous memory or other slave devices. Several interfaces are provided to enhance application code debugging. In addition to the built-in ARM Cortex™-R4F CoreSight™ debug interface, an External Trace Macrocell (ETM) provides instruction and data tracing of program execution. For instrumentation purposes, a RAM Trace Port (RTP) module is implemented to support high-speed output of RAM accesses performed by the CPU or any other master. A Direct Memory Module (DMM) provides the capability to write external data into device memory. The RTP and DMM have no or minimal impact on the program execution timing of application code. A Parameter Overlay Module (POM) can reroute flash accesses to the EMIF, eliminating the need for reprogramming steps required for parameter updates within flash.

• High-performance automotive-grade MCU for safety-critical applications
  • Certified for use in SIL3 applications
  • Dual CPU cores running in lockstep
  • ECC on Flash and SRAM
  • CPU and memory BIST
  • ESM with error pin
• ARM Cortex™-R4F 32-bit RISC CPU
  • High-efficiency 1.6 DMIPS/MHz with 8-stage pipeline
  • FPU with single/double precision
  • MPU
  • Open architecture with third-party support
• Operating Characteristics
  • Up to 160MHz system clock
  • Core supply voltage (VCC): 1.5V
  • I/O supply voltage (VCCIO): 3.3V
• Integrated Memory
  • 1MB or 2MB Flash with ECC
  • 128KB or 160KB RAM with ECC
• Multiple communication interfaces including FlexRay, CAN, and LIN
• NHET timer and 2x 12-bit ADC
• EMIF
  • 16-bit data, 22-bit address, 4 chip selects
• Common TMS470/570 platform architecture
  • Consistent memory map across product family
  • RTI OS timer
  • VIM
  • CRC checker (2-channel)
• DMA controller
  • 32 DMA requests and 16 channels/control packets
  • Parity on control packet memory
  • Dedicated MPU
• Clock module based on FMzPLL
  • Oscillator and PLL clock monitors
• Up to 115 peripheral I/O pins
  • 16 dedicated GIO pins — 8 with external interrupts
  • Programmable ECLK
• Communication interfaces: three MibSPI, each with:
  • Four chip selects and one enable pin
  • 128 buffers with parity support
  • One with parallel mode
• Two SCI interfaces with LIN 2.0
• Three DCAN controllers — two with 64 mailboxes, one with 32 mailboxes
  • Parity on mailbox RAM
• Dual-channel FlexRay™ controller
  • 8KB message RAM with parity support
  • Transfer unit with MPU and parity
• NHET
  • 32 programmable I/O channels
  • 128-word NHET RAM with parity support
  • Transfer unit with MPU and parity
• Two 12-bit MibADC
  • 24 ADC input channels total
  • 64 parity-supported buffers per channel
• Trace and calibration interfaces
  • ETMR4
  • DMM
  • RTP
  • POM
• On-chip emulation logic including IEEE 1149.1 JTAG, boundary scan, and ARM CoreSight components
• Complete development kit available
  • Development board
  • Code Composer Studio IDE
  • HaLCoGen code generation tool
  • HET assembler and simulator
  • nowFlash Flash programming tool
• Supported packages
  • 144-pin QFP (PEG) [Green]
  • 337-pin BGA (ZWT) [Green]
• Community resources
  • TI E2E Community