Infineon/CYPRESS CY27H010-35WC
| Produttore | |
| Cod. Prod. | CY27H010-35WC |
| Cod. LCSC | C2957115 |
| Imballo | CDIP-32 |
| Numero Cliente | |
| Attr. chiave | CDIP-32 Memory |
| Scheda Tecnica | Infineon/CYPRESS CY27H010-35WC |
Specifiche del Prodotto
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Memory/Memory | |
| Produttore | Infineon/CYPRESS | |
| Imballo | CDIP-32 |
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Memory/Memory | |
| Produttore | Infineon/CYPRESS |
| Tipo | Descrizione | |
|---|---|---|
| Imballo | CDIP-32 |
Descrizione
The CY27H010 is a high-performance 1-megabit CMOS EPROM organized as 128KB. It is available in industry-standard 32-pin, 600-mil DIP, LCC, PLCC, and TSOP-I packages. These devices offer high-density storage and 40MHz performance. The CY27H010 is available in windowed and opaque packages. The windowed package allows UV erasure of the device, enabling 100% reprogrammability. The CY27H010 features a power-down Chip Enable (CE) input and Output Enable (OE). When CE is deasserted, the device enters a low-power standby mode. The OE pin tristates the outputs without placing the device into standby mode. CE enables lower power consumption, while OE enables faster output tristate switching. The memory cells utilize proven EPROM floating-gate technology and a byte-wide intelligent programming algorithm. EPROM cells require only 12.75V overvoltage, and low programming current allows gang programming. The device allows 100% testing of each memory location, as each location is written, erased, and cycled prior to packaging. Each device also undergoes AC performance testing to ensure that the product meets DC and AC specification limits after customer programming. The CY27H010 is read by asserting the CE (overbar) and OE (overbar) inputs. The contents of the memory location selected by the address on inputs A₁₆–A₀ will appear on outputs O₇–O₀.
Caratteristiche
- CMOS for speed/power
- High speed: tAA = 25 ns max (commercial)
- Low power: 275 mW max; <85 mW deselected
- Byte-wide memory organization
- 100% reprogrammable (windowed package)
- EPROM technology
- Capable of withstanding >200V ESD
- Available packages: 32-pin PLCC, 32-pin TSOP-I, 32-pin 600-mil plastic or ceramic DIP, 32-pin ceramic LCC
| Qtà | Pr. unit.(Solo per riferimento) | Importo totale |
|---|---|---|
| 1+ | $ 0.5324 | $ 0.53 |
| 200+ | $ 0.2068 | $ 41.36 |
| 500+ | $ 0.1991 | $ 99.55 |
| 1,000+ | $ 0.196 | $ 196.00 |
Package Standard25/Full Tube | ||
Specifiche del Prodotto
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Memory/Memory | |
| Produttore | Infineon/CYPRESS | |
| Imballo | CDIP-32 |
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Memory/Memory | |
| Produttore | Infineon/CYPRESS |
| Tipo | Descrizione | |
|---|---|---|
| Imballo | CDIP-32 |
Descrizione
The CY27H010 is a high-performance 1-megabit CMOS EPROM organized as 128KB. It is available in industry-standard 32-pin, 600-mil DIP, LCC, PLCC, and TSOP-I packages. These devices offer high-density storage and 40MHz performance. The CY27H010 is available in windowed and opaque packages. The windowed package allows UV erasure of the device, enabling 100% reprogrammability. The CY27H010 features a power-down Chip Enable (CE) input and Output Enable (OE). When CE is deasserted, the device enters a low-power standby mode. The OE pin tristates the outputs without placing the device into standby mode. CE enables lower power consumption, while OE enables faster output tristate switching. The memory cells utilize proven EPROM floating-gate technology and a byte-wide intelligent programming algorithm. EPROM cells require only 12.75V overvoltage, and low programming current allows gang programming. The device allows 100% testing of each memory location, as each location is written, erased, and cycled prior to packaging. Each device also undergoes AC performance testing to ensure that the product meets DC and AC specification limits after customer programming. The CY27H010 is read by asserting the CE (overbar) and OE (overbar) inputs. The contents of the memory location selected by the address on inputs A₁₆–A₀ will appear on outputs O₇–O₀.
Caratteristiche
- CMOS for speed/power
- High speed: tAA = 25 ns max (commercial)
- Low power: 275 mW max; <85 mW deselected
- Byte-wide memory organization
- 100% reprogrammable (windowed package)
- EPROM technology
- Capable of withstanding >200V ESD
- Available packages: 32-pin PLCC, 32-pin TSOP-I, 32-pin 600-mil plastic or ceramic DIP, 32-pin ceramic LCC
C2957115 Libreria EasyEDA
Conformità & Codici di Esportazione
| Tipo | Dettagli |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Tipo | Dettagli |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Tipo | Dettagli |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |

