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MXIC MX25L25645GZ2I-10G product image
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MXIC MX25L25645GZ2I-10G

Hersteller
Herst.-Teilenr.
MX25L25645GZ2I-10G
LCSC-Nr.
C2802980
Verp.
WSON-8-EP(6x8)
Kundennummer
Hauptmerkm.
256M-BIT CMOS MXSMIO (SERIAL MULTI I/O) FLASH MEMORY
DatenblattMXIC MX25L25645GZ2I-10G
Alternativteile10
Vorrätig: 383
383 Ab Lager, sofort versandfertig
Minimum: 1Vielfaches: 1Verkaufseinheit: Piece
Zur BOM-Liste hinzufügen
Stk.E-PreisGesamtbetrag
1+$ 7.5277$ 7.53
10+$ 6.6575$ 66.58
30+$ 6.1384$ 184.15
100+$ 5.616$ 561.60
480+$ 5.3743$ 2579.66
960+$ 5.265$ 5054.40
Standardgehäuse480/Full Tray
Besserer Preis bei größerer Menge?
$

Produktspezifikationen

Alle
TypBeschreibung
KategorieIntegrated Circuits (ICs)/Memory/Memory
HerstellerMXIC
Verp.WSON-8-EP(6x8)
Operating Temperature-40℃~+85℃
FeaturesWrite enable latch;Hardware write protection;Software write protection;Absolute write protection
Memory Size256Mbit
Voltage - Supply2.7V~3.6V
Program / Erase Cycles100,000 cycles
Clock Frequency120MHz
Data Retention - TDR (Year)20 Years
Block Erase Time(tBE)-
Write Cycle Time(tWC)-
Page Programming Time (Tpp)750us
Standby Supply Current0.2mA
InterfaceSPI

Merkmale

KI-Übersetzung
  • Protocol Support - Single I/O, Dual I/O and Quad I/O
  • Supports DTR (Double Transfer Rate) Mode
  • Supports clock frequencies up to 133MHz
  • Supports Serial Peripheral Interface -- Mode 0 and Mode 3
  • Single Power Supply Operation - 2.7 to 3.6 volts for read, erase, and program operations
  • 268,435,456×1 bit structure or 134,217,728×2 bits (two I/O mode) structure or 67,108,864×4 bits (four I/O mode) structure
  • Latch-up protected to 100mA from -1V to Vcc + 1V
  • Low Vcc write inhibit is from 1.5V to 2.5V
  • Fast read for SPI mode - Supports clock frequencies up to 133MHz for all protocols
  • Supports Fast Read, 2READ, DREAD, 4READ, QREAD instructions
  • Configurable dummy cycle number for fast read operation
  • Supports Performance Enhance Mode - XIP (execute-in-place)
  • Quad Peripheral Interface (QPI) available
  • Equal 4K byte sectors, or Equal Blocks with 32K bytes or 64K bytes each - Any Block can be erased individually
  • Programming: 256byte page buffer
  • Quad Input/Output page program(4PP) to enhance program performance
  • Typical 100,000 erase/program cycles
  • 20 years data retention
  • Input Data Format: 1-byte Command code
  • Advanced Security Features: Block lock protection

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