TI ADC34J43IRGZR

The ADC34J4x is a high-linearity, ultra-low-power, quad-channel, 14-bit, 50MSPS to 160MSPS ADC. These devices are specifically designed to support demanding high input frequency signals with wide dynamic range requirements. When the SYSREF input enables whole-system synchronization, the clock input divider provides greater flexibility in system clock architecture design. The ADC34J4x series supports serial CML and JESD204B interfaces, reducing the number of interface lines and achieving high system integration. The JESD204B interface is a serial interface that serializes the data output of each ADC through a single differential pair. An internal PLL multiplies the incoming ADC sampling clock by 20 to obtain the bit clock used for serial output of 14-bit data per channel. The ADC34J4x devices support Subclass 1 with interface rates up to 3.2Gbps.

• Multi-carrier, multi-mode cellular base stations
• Radar and smart antenna arrays
• Motor control feedback
• Network and vector analyzers
• Communications test equipment
• Non-destructive testing
• Microwave receivers
• SDR quadrature and diversity radio receivers