MICROCHIP AT28HC256-12SU-T
| Producent | |
| Nr części prod. | AT28HC256-12SU-T |
| Nr LCSC | C2062068 |
| Opak. | SOIC-28-300mil |
| Numer Klienta | |
| Klucz. cechy | 256Kbit High-Speed Paged Parallel EEPROM |
| Karta Katalogowa | MICROCHIP AT28HC256-12SU-T |
| Zgodność z RoHS | 1 dokumentów dostępnych |
| Części alternatywne | 1 |
Specyfikacje Produktu
| Typ | Opis | |
|---|---|---|
| Kategoria | Integrated Circuits (ICs)/Memory/Memory | |
| Producent | MICROCHIP | |
| Opak. | SOIC-28-300mil | |
| Operating Temperature | -55℃~+125℃ | |
| Features | Hardware write protection function;Software write protection function;Built-in error correction code (ECC) function | |
| Memory Size | 256Kbit | |
| Voltage - Supply | 4.5V~5.5V;80mA | |
| Clock Frequency | - | |
| Access Time | 120ns | |
| Data Retention - TDR (Year) | 10 years | |
| Write Cycle Time(tWC) | 10ms | |
| Standby Supply Current | 3mA | |
| Write Cycle Endurance | 10000 times | |
| Interface | Parallel Port (Parallel) |
| Typ | Opis | |
|---|---|---|
| Kategoria | Integrated Circuits (ICs)/Memory/Memory | |
| Producent | MICROCHIP | |
| Opak. | SOIC-28-300mil | |
| Operating Temperature | -55℃~+125℃ | |
| Features | Hardware write protection function;Software write protection function;Built-in error correction code (ECC) function | |
| Memory Size | 256Kbit | |
| Voltage - Supply | 4.5V~5.5V;80mA |
| Typ | Opis | |
|---|---|---|
| Clock Frequency | - | |
| Access Time | 120ns | |
| Data Retention - TDR (Year) | 10 years | |
| Write Cycle Time(tWC) | 10ms | |
| Standby Supply Current | 3mA | |
| Write Cycle Endurance | 10000 times | |
| Interface | Parallel Port (Parallel) |
Opis
The AT28HC256 is a high‑performance Electrically Erasable and Programmable Read‑Only Memory (EEPROM). Its 256‑Kb memory is organized as 32,768 words by 8 bits. Manufactured with advanced nonvolatile CMOS technology, the device offers access times to 90 ns with power dissipation of just 440 mw. When the device is deselected, the CMOS standby current is less than 5 mA. The AT28HC256 is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 64‑byte page register to allow writing of up to 64 bytes simultaneously. During a write cycle, the address and 1 to 64 bytes of data are internally latched, freeing the address and data bus for other operations. Following the initiation of a write cycle, the device will automatically write the latched data using an internal control timer. The end of a write cycle can be detected by DATA Polling of I/O7. Once the end of a write cycle has been detected, a new access for a read or write can begin. The AT28HC256 has additional features to ensure high quality and manufacturability. The device utilizes internal error correction for extended endurance and improved data retention characteristics. An optional software data protection mechanism is available to guard against inadvertent writes. The device also includes an extra 64 bytes of EEPROM for device identification or tracking.
Funkcje
- Fast Read Access Time: 90 ns
- Automatic Page Write Operation: Internally organized as 32,768 x 8 (256K)
- Internal address and data latches for 64 bytes
- Internal control timer
- Fast Write Cycle Time:
- Page Write cycle time: 3 ms or 10 ms maximum
- 1 to 64-byte Page Write operation
- Low-Power Dissipation:
- 80 mA active current
- 3 mA CMOS standby current
- Hardware and Software Data Protection
- DATA Polling for End of Write Detection
- High Reliability CMOS Technology:
- Endurance: 10,000 or 100,000 cycles
- Data retention: 10 years
- Single 5V ±10% Supply
- CMOS and TTL Compatible Inputs and Outputs
- JEDEC Approved Byte-Wide Pinout
- Full Temperature Range
| Szt. | Cena jedn.(Tylko do wglądu) | Suma całkowita |
|---|---|---|
| 1+ | $ 13.1879 | $ 13.19 |
| 200+ | $ 5.1034 | $ 1020.68 |
| 500+ | $ 4.9251 | $ 2462.55 |
| 1,000+ | $ 4.8368 | $ 4836.80 |
Standardowa Obudowa1000/Full Reel | ||
Specyfikacje Produktu
| Typ | Opis | |
|---|---|---|
| Kategoria | Integrated Circuits (ICs)/Memory/Memory | |
| Producent | MICROCHIP | |
| Opak. | SOIC-28-300mil | |
| Operating Temperature | -55℃~+125℃ | |
| Features | Hardware write protection function;Software write protection function;Built-in error correction code (ECC) function | |
| Memory Size | 256Kbit | |
| Voltage - Supply | 4.5V~5.5V;80mA | |
| Clock Frequency | - | |
| Access Time | 120ns | |
| Data Retention - TDR (Year) | 10 years | |
| Write Cycle Time(tWC) | 10ms | |
| Standby Supply Current | 3mA | |
| Write Cycle Endurance | 10000 times | |
| Interface | Parallel Port (Parallel) |
| Typ | Opis | |
|---|---|---|
| Kategoria | Integrated Circuits (ICs)/Memory/Memory | |
| Producent | MICROCHIP | |
| Opak. | SOIC-28-300mil | |
| Operating Temperature | -55℃~+125℃ | |
| Features | Hardware write protection function;Software write protection function;Built-in error correction code (ECC) function | |
| Memory Size | 256Kbit | |
| Voltage - Supply | 4.5V~5.5V;80mA |
| Typ | Opis | |
|---|---|---|
| Clock Frequency | - | |
| Access Time | 120ns | |
| Data Retention - TDR (Year) | 10 years | |
| Write Cycle Time(tWC) | 10ms | |
| Standby Supply Current | 3mA | |
| Write Cycle Endurance | 10000 times | |
| Interface | Parallel Port (Parallel) |
Opis
The AT28HC256 is a high‑performance Electrically Erasable and Programmable Read‑Only Memory (EEPROM). Its 256‑Kb memory is organized as 32,768 words by 8 bits. Manufactured with advanced nonvolatile CMOS technology, the device offers access times to 90 ns with power dissipation of just 440 mw. When the device is deselected, the CMOS standby current is less than 5 mA. The AT28HC256 is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 64‑byte page register to allow writing of up to 64 bytes simultaneously. During a write cycle, the address and 1 to 64 bytes of data are internally latched, freeing the address and data bus for other operations. Following the initiation of a write cycle, the device will automatically write the latched data using an internal control timer. The end of a write cycle can be detected by DATA Polling of I/O7. Once the end of a write cycle has been detected, a new access for a read or write can begin. The AT28HC256 has additional features to ensure high quality and manufacturability. The device utilizes internal error correction for extended endurance and improved data retention characteristics. An optional software data protection mechanism is available to guard against inadvertent writes. The device also includes an extra 64 bytes of EEPROM for device identification or tracking.
Funkcje
- Fast Read Access Time: 90 ns
- Automatic Page Write Operation: Internally organized as 32,768 x 8 (256K)
- Internal address and data latches for 64 bytes
- Internal control timer
- Fast Write Cycle Time:
- Page Write cycle time: 3 ms or 10 ms maximum
- 1 to 64-byte Page Write operation
- Low-Power Dissipation:
- 80 mA active current
- 3 mA CMOS standby current
- Hardware and Software Data Protection
- DATA Polling for End of Write Detection
- High Reliability CMOS Technology:
- Endurance: 10,000 or 100,000 cycles
- Data retention: 10 years
- Single 5V ±10% Supply
- CMOS and TTL Compatible Inputs and Outputs
- JEDEC Approved Byte-Wide Pinout
- Full Temperature Range
C2062068 Biblioteka EasyEDA
Zgodność & Kody Eksportowe
| Typ | Szczegóły |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Typ | Szczegóły |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Typ | Szczegóły |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
Części alternatywne
| MPN | Producent | Opakowanie | Dostępność | Cena jednostkowa | ||
|---|---|---|---|---|---|---|
| AT28HC256-12SU | MICROCHIP | SOIC-28-300mil | 0 | $ 0.4631 |

