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micron MT41K512M16TNA-125 IT:E

Produttore
Cod. Prod.
MT41K512M16TNA-125 IT:E
Cod. LCSC
C20528957
Imballo
FBGA-96(10x14)
Numero Cliente
Attr. chiave
8Gbit 800MHz DDR3L SDRAM FBGA-96(10x14) Memory RoHS
Scheda Tecnicamicron MT41K512M16TNA-125 IT:E
Parti alternative11
Esaurito
Avvisami
Minimo: 1Multiplo: 1Unità di vendita: Piece
Aggiungi alla Lista BOM
QtàPr. unit.(Solo per riferimento)Importo totale
1+$ 89.7813$ 89.78
200+$ 35.8233$ 7164.66
500+$ 34.6264$ 17313.20
1,000+$ 34.0356$ 34035.60
Package Standard1000/Full Bag
Prezzo migliore per quantità maggiore?
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Specifiche del Prodotto

Tutto
TipoDescrizione
CategoriaIntegrated Circuits (ICs)/Memory/Memory
Produttoremicron
ImballoFBGA-96(10x14)
Operating Temperature-40℃~+95℃
FeaturesAuto self-refresh;Asynchronous reset function;Data mask function;Dynamic on-chip termination;ZQ calibration function
Refresh Current50mA
Memory Size8Gbit
Voltage - Supply89mA;1.283V~1.45V
Clock Frequency800MHz
Memory FormatDDR3L SDRAM

Descrizione

Traduzione AI

8Gb (TwinDie™) 1.35V DDR3L SDRAM is a low-voltage version of the 1.5V DDR3 SDRAM device. It utilizes two Micron 4Gb DDR3L SDRAM x16 dies, essentially comprising two 4Gb DDR3L SDRAM memory arrays. Unless otherwise specified, DDR3L conforms to the functional and timing specifications listed in the equivalent-density DDR3 SDRAM datasheet. For specifications not included in this document, refer to the Micron 4Gb DDR3 SDRAM datasheet. Specifications for base part number MT41K256M16 (monolithic) are associated with manufactured part number MT41K512M16. TwinDie DDR3L SDRAM is a high-speed CMOS dynamic random access memory device, internally configured as two 8-bank DDR3L SDRAM devices. Although each die in the dual-die package is tested individually, some TwinDie test results may differ from those of equivalent dies tested in monolithic die packages. DDR3L SDRAM employs a double data rate architecture to achieve high-speed operation. Differential data strobe signals (DQS, DQS#) are transmitted externally along with data for data capture at the DDR3L SDRAM input receivers. Read and write accesses to DDR3L SDRAM are burst-oriented. This datasheet provides a general description, package dimensions, and package emergency solutions. For complete information on individual die initialization, register definitions, command descriptions, and die operations, refer to the Micron monolithic DDR3L datasheet. The industrial temperature (IT) option (if available) requires that case temperature not exceed -40°C or 95°C. When TC exceeds 85°C, JEDEC specifications require the refresh rate to be doubled; this also requires use of the high-temperature self-refresh option. Additionally, when TC < 0°C or > 95°C, ODT resistance, IDD values, some IDD specifications, and input/output impedance must be derated.

Caratteristiche

Traduzione AI
  • Two 4Gb x16 Micron dies in a single package
  • Two ranks (including dual CS#, ODT, CKE, and ZQ pins)
  • VDD = VDDQ = 1.35V (1.283 - 1.425V); backward compatible with 1.5V operation
  • 1.35V center-tapped push-pull I/O
  • JEDEC standard emergency solution
  • Thin package
  • TC range: 0°C to 95°C
  • 0°C to 85°C: 8192 refresh cycles within 64ms
  • 85°C to 95°C: 8192 refresh cycles within 32ms

Parti alternative

MPNProduttoreImballaggioDisponibilitàPrezzo unitario
MT41K512M16TNA-125 IT:E TRmicron96-FBGA (10x14)0$ 78.1883
IS43TR16512BL-107MBLIISSITWBGA-96(10x14)0$ 19.0938
MT41K512M16TNA-125:Emicron96-FBGA (10x14)0$ 31.0845
MT41K512M16TNA-125:E TRmicron96-FBGA (10x14)0$ 59.8542
IS46TR16512BL-125KBLA1-TRISSITWBGA-96(10x14)0$ 53.7376
IS43TR16512AL-125KBLIISSILFBGA-96(10x14)0$ 70.3475
IS43TR16512BL-107MBLI-TRISSITWBGA-96(10x14)0$ 50.0342
IS46TR16512BL-107MBLA1ISSITWBGA-96(10x14)0$ 45.5384
IS46TR16512BL-107MBLA1-TRISSITWBGA-96(10x14)0$ 56.4822
MT41K512M16TNA-125 M:Emicron96-FBGA (10x14)0$ 85.5909
IS43TR16512BL-107MBL-TRISSITWBGA-96(10x14)0$ 45.7749