RENESAS R5F51403ADFJ#50

48-MHz, 32-bit RX MCUs, on-chip FPU, 204 Coremark, up to 256-KB flash memory, up to 36 pins capacitive touch sensing unit, up to 9 comms channels, 12-bit A/D, D/A, RTC, IEC60730 compliance, 1.8-V to 5.5-V single supply, Encryption functions (optional)

• 32-bit RXv2 CPU core
  • Max. operating frequency: 48 MHz Capable of 204 Coremark in operation at 48 MHz
  • Enhanced DSP instructions: 32-bit multiply-accumulate instructions, and 16-bit multiply-subtract instructions are supported.
  • On-chip FPU: 32-bit single-precision floating point compliant with IEEE-754
  • On-chip divider that operated at the fastest of two clock cycles
  • Fast interrupt
  • CISC Harvard architecture with 5-stage pipeline
  • Variable-length instructions, ultra-compact code
  • On-chip debugging circuit
• Low power design and architecture
  • Operation from a single 1.8-V to 5.5-V supply
  • Four low power consumption modes
  • Low power timer (LPT) that operates during the software standby state
  • Supply current High-speed operating mode: 58 μA/MHz Supply current in software standby mode: 0.25 μA (typ.) (Ta = 25℃)
  • Recovery time from software standby mode: 6.2 μs (typ.) (Clock Source: HOCO 32 MHz, Ta = 25℃)
• On-chip flash memory for code
  • 64 K/128 K/256 Kbytes size capacities
  • User code is programmable by on-board programming.
  • Programmable at 1.8 V
  • For instructions and operands
• On-chip data flash memory
  • 4K/8 Kbytes (1,000,000 program/erase cycles (typ.))
  • BGO (Background Operation)
• On-chip SRAM, no wait states
  • 16 K/32 K/64 Kbytes size capacities
• DTC
  • Five transfer modes
• ELC
  • Module operation can be initiated by event signals without using interrupts.
  • Linked operation between modules is possible while the CPU is sleeping.
• Reset and supply management
  • Seven types of reset, including the power-on reset (POR)
  • Low voltage detection (LVD) with voltage settings
• Clock functions
  • External clock input frequency: Up to 20 MHz
  • Main clock oscillator frequency: 1 to 20 MHz
  • Sub clock oscillator frequency: 32.768 kHz
  • PLL circuit input: 4 MHz to 12 MHz
  • Low-speed on-chip oscillator: 4 MHz
  • High-speed on-chip oscillator: 24/32/48 MHz ±1%
  • IWDT-dedicated on-chip oscillator: 15 kHz
  • Generate a 32.768 kHz clock for the real-time clock
  • On-chip clock frequency accuracy measurement circuit (CAC)
• Realtime clock
  • Adjustment functions (30 seconds, leap year, and error)
  • Calendar count mode or binary count mode selectable
• Independent watchdog timer
  • 15-kHz on-chip oscillator produces a dedicated clock signal to drive IWDT operation.
• Useful functions for IEC60730 compliance
  • Self-diagnostic and disconnection-detection assistance functions for the A/D converter, clock frequency accuracy measurement circuit, independent watchdog timer, RAM test assistance functions using the DOC, etc.
• MPC
  • Input/output functions selectable from multiple pins
• Up to 9 communication functions
  • One channel of CAN module compliant with ISO11898-1: Transfer at up to 1 Mbps
  • SCI with many useful functions (up to 6 channels) Asynchronous mode (Fine adjustable baud rate: 0 to 255/255), clock synchronous mode, smart card interface mode
  • I2C bus interface: Transfer at up to 400 kbps, capable of SMBus operation (one channel)
  • RSPI (one channel): Transfer at up to 16 Mbps
• Up to 12 extended-function timers
  • 16-bit MTU: input capture, output compare, complementary PWM output, phase counting mode (six channels)
  • 8-bit TMR (four channels)
  • 16-bit compare-match timers (two channels)
• 12-bit A/D converter
  • Capable of conversion within 0.67 μs
  • 17 (external pin input) +1 (internal input) channels
  • Sampling time can be set for each channel
  • Conversion results compare features
  • Self-diagnostic function and analog input disconnection detection assistance function
  • Double trigger (data duplication) function for motor control