SILICON LABS SI5357AD08803-GMR

Based on Silicon Labs proprietary MultiSynth flexible frequency synthesis technology, the Si5357 generates any combination of output frequencies with excellent jitter performance. The device's highly flexible architecture enables a single device to generate a wide range of integer and non-integer related frequencies on up to 12 clock outputs with 0 ppm frequency synthesis error. The device offers multiple banks of outputs that can each be tied to independent voltages, enabling usage in mixed-supply applications. Given its frequency, format, and supply voltage flexibility, the Si5357 is ideally suited to replace multiple clock ICs and oscillators with a single device. The Si5357 is quickly and easily configured using ClockBuilder Pro software. ClockBuilder Pro assigns a custom part number for each unique configuration. Devices are factory-programmable free of charge, making it easy to get a custom clock uniquely tailored for each application. Devices can also be in-circuit programmed via an I2C serial interface. The Si5357 is a high-performance, low-jitter clock generator capable of synthesizing up to 12 user-programmable clock frequencies up to 170 MHz. The device supports free-run operation using an external crystal, or it can lock to an external clock signal. The output drivers support up to 12 differential clocks or 24 LVCMOS clocks, or a combination of both. VDDO pins are provided for versatility, which can be set to 3.3 V, 2.5 V, 1.8 V, or 1.5 V to power the multi-format output drivers. The core voltage supply (VDD) accepts 3.3 V, 2.5 V, or 1.8 V and is independent from the output supplies (VDDOxs). Using its two-stage synthesis architecture and patented high-resolution low-jitter MultiSynth technology, the Si5357 can generate an entire clock tree from a single device. The Si5357 combines a wideband PLL with next generation MultiSynth technology to offer the industry’s highest output count high performance programmable clock generator, while maintaining excellent jitter performance. The PLL locks to either an external 16 - 30 MHz crystal (XA/XB) for generating free-running clocks or to an external clock (CLKIN_2/CLKIN_2#) for generating synchronous clocks. In free-run mode, the oscillator frequency is multiplied by the PLL and then divided down either by an integer divider or MultiSynth for fractional synthesis. The Si5357 features user-defined universal hardware input pins which can be configured in the ClockBuilder Pro software utility. Universal hardware pins can be used for OE, spread spectrum enable, input clock selection, output frequency selection, or I2C address select. The device provides the option of storing a user-defined clock configuration in its non-volatile memory (NVM), which becomes the default clock configuration at power-up. To enable in-system programming, a power up mode is available through OTP which powers up the chip in an OTP defined default mode but with no outputs enabled. This allows a host processor to first write a user defined subset of the registers and then restart the power-up sequence to activate the newly programmed configuration without re-downloading the OTP.

• Any-frequency 12-output LVCMOS programmable clock generator
• Offered in 32-pin QFN, up to 12 outputs
• MultiSynth technology enables any-frequency synthesis on any output up to 170 MHz
• Highly configurable output path featuring a cross point mux
• Up to three independent fractional synthesis output paths
• Up to five independent integer dividers
• Input frequency range:
  • External crystal: 16 to 50 MHz
  • Differential clock: 10 to 170 MHz
  • LVCMOS clock: 10 to 170 MHz
• Output frequency range: 5 to 170 MHz
• Temperature range: -40 to +85 °C
• RoHS-6 compliant
• Down and center spread spectrum

• Servers, Storage
• Broadcast Video
• Print Imaging
• Test and Measurement
• Audio processing
• Industrial, Embedded Computing