SILICON LABS 545ACA40M0000ABG

The Si545 Ultra Series oscillator utilizes Silicon Laboratories’ advanced 4th generation DSPLL technology to provide an ultra-low jitter, low phase noise clock at any output frequency. The device is factory-programmed to any frequency from 0.2 to 1500 MHz with <1 ppb resolution and maintains exceptionally low jitter for both integer and fractional frequencies across its operating range. The Si545 offers excellent reliability and frequency stability as well as guaranteed aging performance. On-chip power supply filtering provides industry-leading power supply noise rejection, simplifying the task of generating low jitter clocks in noisy systems that use switched-mode power supplies. Offered in industry-standard footprints, the Si545 has a dramatically simplified supply chain that enables Silicon Labs to ship custom frequency samples 1-2 weeks after receipt of order. Unlike a traditional XO, where a different crystal is required for each output frequency, the Si545 uses one simple crystal and a DSPLL IC-based approach to provide the desired output frequency. This process also guarantees 100% electrical testing of every device. The Si545 is factory-configurable for a wide variety of user specifications, including frequency, output format, and OE pin location/polarity. Specific configurations are factory-programmed at time of shipment, eliminating the long lead times associated with custom oscillators.

• Available with any frequency from 0.2 MHz to 1500 MHz
• Ultra low jitter: 80 fs Typ RMS (12 kHz - 20 MHz)
• Excellent PSNR and supply noise immunity: –80 dBc Typ
• 7 ppm stability option (-40 to 85 ℃)
• 3.3 V, 2.5 V and 1.8 VDD supply operation from the same part number
• LVPECL, LVDS, CML, HCSL, CMOS, and Dual CMOS output options
• 2.5x3.2, 3.2x5, 5x7 mm package options
• Samples available with 1-2 week lead times

• 100G/200G/400G OTN, coherent optics
• 10G/40G/100G optical ethernet
• 3G-SDI/12G-SDI/24G-SDI broadcast video
• Datacenter
• Test and measurement
• Clock and data recovery
• FPGA/ASIC clocking