RENESAS 6116LA45SOG

The IDT6116SA/LA is a 16384-bit high-speed SRAM organized as 2K×8. It is fabricated using IDT's high-performance, high-reliability CMOS technology. Access time is as fast as 15ns. The device also offers a low-power standby mode. When chip select CS̄ is driven high, the circuit automatically enters and remains in standby power mode for as long as CS̄ stays high. This feature significantly reduces system-level power consumption and thermal management costs. The low-power (LA) version additionally supports battery-backup data retention, typically consuming only 1μW to 4μW from a 2V battery supply. All inputs and outputs of the IDT6116SA/LA are TTL-compatible. The fully static asynchronous design requires no clock or refresh signals. The IDT6116SA/LA is available in 24-pin 600- and 300-mil plastic or ceramic DIP, 24-pin gull-wing SOIC, and 24-pin J-bend SOJ packages for high board-level packing density.

• High-speed access and chip select times
  • Industrial grade: 20/25/35/45ns (max)
  • Commercial grade: 15/20/25/35/45ns (max)
• Low power consumption
• Battery backup operation
  • 2V data retention voltage (LA version only)
• Fabricated using advanced CMOS high-performance technology
• CMOS process virtually eliminates alpha particle soft error rate
• Inputs and outputs directly TTL-compatible
• Static operation: no clock or refresh required
• Available in ceramic and plastic 24-pin DIP, 24-pin thin DIP, 24-pin SOIC, and 24-pin SOJ packages