LCSC Electronics logoLCSC Electronics svg logo
Accedi
USD
Infineon/CYPRESS CY2309CZXC-1T product image
Immagini a scopo illustrativo

Infineon/CYPRESS CY2309CZXC-1T

Produttore
Cod. Prod.
CY2309CZXC-1T
Cod. LCSC
C2957553
Imballo
TSSOP-16
Numero Cliente
Attr. chiave
TSSOP-16 Clock Generators, PLLs, Frequency Synthesizers
Scheda TecnicaInfineon/CYPRESS CY2309CZXC-1T
Esaurito
Avvisami
Minimo: 1Multiplo: 1Unità di vendita: Piece
Aggiungi alla Lista BOM
QtàPr. unit.(Solo per riferimento)Importo totale
1+$ 0.4027$ 0.40
200+$ 0.1559$ 31.18
500+$ 0.1504$ 75.20
1,000+$ 0.1477$ 147.70
Package Standard25/Full Tube
Prezzo migliore per quantità maggiore?
$

Specifiche del Prodotto

Tutto
TipoDescrizione
CategoriaIntegrated Circuits (ICs)/Clock/Timing/Clock Generators, PLLs, Frequency Synthesizers
ProduttoreInfineon/CYPRESS
ImballoTSSOP-16
FeaturesPower-off isolation

Descrizione

Traduzione AI

The CY2309 is a low-cost 3.3V zero delay buffer designed to distribute high-speed clocks and is available in a 16-pin SOIC or TSSOP package. The CY2305 is an 8-pin version of the CY2309. It accepts one reference input, and drives out five low-skew clocks. The -1H versions of each device operate at up to 100-/133 MHz frequencies, and have higher drive than the -1 devices. All parts have on-chip PLLs which lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. The CY2309 has two banks of four outputs each, which can be controlled by the Select inputs. If all output clocks are not required, BankB can be three-stated. The select inputs also allow the input clock to be directly applied to the outputs for chip and system testing purposes. The CY2305 and CY2309 PLLs enter a power down mode when there are no rising edges on the REF input. In this state, the outputs are three-stated and the PLL is turned off, resulting in less than 25.0 μA current draw for these parts. Multiple CY2305 and CY2309 devices can accept the same input clock and distribute it. In this case, the skew between the outputs of two devices is guaranteed to be less than 700 ps. The CY2305/CY2309 is available in two/three different configurations. The CY2305-1/CY2309-1 is the base part. The CY2305-1H/ CY2309-1H is the high-drive version of the -1, and its rise and fall times are much faster than the -1s.

Caratteristiche

Traduzione AI
  • 10 MHz to 100-/133 MHz operating range, compatible with CPU and PCI bus frequencies
  • Zero input-output propagation delay
  • 60 ps typical cycle-to-cycle jitter (high drive)
  • Multiple low-skew outputs, 85 ps typical output-to-output skew
  • One input drives five outputs (CY2305)
  • One input drives nine outputs, grouped as 4+4+1 (CY2309)
  • Compatible with Pentium-based systems
  • Test Mode to bypass phase-locked loop (PLL) (CY2309 only)
  • Available in space-saving 16-pin 150-mil SOIC or 4.4-mm TSSOP packages (CY2309), and 8-pin, 150-mil SOIC package (CY2305)
  • 3.3V operation
  • Industrial temperature available