MaxLinear XR16C854DIV-F

The XR16C854/854D1 (854) is an enhanced quad Universal Asynchronous Receiver and Transmitter (UART) each with 128 bytes of transmit and receive FIFOs, transmit and receive FIFO counters and trigger levels, automatic hardware and software flow control, and data rates of up to 2 Mbps. Each UART has a set of registers that provide the user with operating status and control, receiver error indications, and modem serial interface controls. System interrupts may be tailored to meet design requirements. An internal loopback capability allows onboard diagnostics. The 854 is available in 64-pin LQFP, 68-pin PLCC and 100-pin QFP packages. The 64-pin package only offers the 16 mode interface, but the 68 and 100 pin packages offer an additional 68 mode interface which allows easy integration with Motorola processors. The XR16C854CV (64 pin) offers three state interrupt outputs while the XR16C854DV provides continuous interrupt outputs. The 100 pin package provides additional FIFO status outputs (TXRDY# and RXRDY# A-D), separate infrared transmit data outputs (IRTX A-D) and channel C external clock input (CHCCLK). The XR16C854/854D is compatible with the industry standard ST16C554/554D and ST16C654/654D.

The XR16C854 (854) integrates the functions of 4 enhanced 16C550 Universal Asynchronous Receiver and Transmitter (UART). Each UART is independently controlled having its own set of device configuration registers. The configuration registers set is 16550 UART compatible for control, status and data transfer. Additionally, each UART channel has 128-bytes of transmit and receive FIFOs, automatic RTS/CTS hardware flow control with hysteresis control, automatic Xon/Xoff and special character software flow control, programmable transmit and receive FIFO trigger levels, FIFO level counters, infrared encoder and decoder (IrDA ver 1.0), programmable baud rate generator with a prescaler of divide by 1 or 4, and data rate up to 2 Mbps. The XR16C854 can operate at 3.3 or 5 volts. The 854 is fabricated with an advanced CMOS process.

• Added feature in devices with top mark date code of "F2 YYWW" and newer
• 5 volt tolerant inputs
• 2.97 to 5.5 Volt Operation
• Pin-to-pin compatible with the industry standard ST16C554 and ST16C654 and TI’s TL16C554N and TL16C754BFN
• Four independent UART channels
• Register Set Compatible to 16C550
• Data rates of up to 2 Mbps
• Transmit and Receive FIFOs of 128 bytes
• Programmable TX and RX FIFO Trigger Levels
• Transmit and Receive FIFO Level Counters
• Automatic Hardware (RTS/CTS) Flow Control
• Selectable Auto RTS Flow Control Hysteresis
• Automatic Software (Xon/Xoff) Flow Control
• Wireless Infrared (IrDA 1.0) Encoder/Decoder
• Sleep Mode (200 uA typical)
• Crystal oscillator or external clock input

• Portable Appliances
• Telecommunication Network Routers
• Ethernet Network Routers
• Cellular Data Devices
• Factory Automation and Process Control