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ADI AD561KNZ

Producent
Nr części prod.
AD561KNZ
Nr LCSC
C649877
Opak.
PDIP-16
Numer Klienta
Klucz. cechy
AD561 10bit Digital-to-Analog Converter
Karta KatalogowaADI AD561KNZ
Zgodność z RoHS1 dokumentów dostępnych
Brak w magazynie
Powiadom mnie
Minimum: 1Wielokrotność: 1Jednostka sprzedaży: Piece
Dodaj do Listy BOM
Szt.Cena jedn.(Tylko do wglądu)Suma całkowita
1+$ 209.5276$ 209.53
200+$ 81.0847$ 16216.94
500+$ 78.2354$ 39117.70
1,000+$ 76.8278$ 76827.80
Standardowa Obudowa25/Full Tube
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Specyfikacje Produktu

Wszystko
TypOpis
KategoriaIntegrated Circuits (ICs)/Data Acquisition/Digital to Analog Converters (DAC)
ProducentADI
Opak.PDIP-16
Settling Time250ns
Operating Temperature0℃~+70℃
Voltage - Supply4.5V~16.5V
Quiescent Current (Iq)-
FunctionBipolar output;Built-in reference source
Integral non - linearity0.25LSB
Number of Channels1
Resolution (Bits)10;-
Interface Type-

Opis

Tłumaczenie AI

The AD561 is an integrated circuit 10-bit digital-to-analog converter combined with a high stability voltage reference fabricated on a single monolithic chip. Using ten precision highspeed current-steering switches, a control amplifier, voltage reference, and laser-trimmed thin-film SiCr resistor network, the device produces a fast, accurate analog output current. Laser trimmed output application resistors are also included to facilitate accurate, stable current-to-voltage conversion; they are trimmed to 0.1% accuracy, thus eliminating external trimmers in many situations.

Several important technologies combine to make the AD561 the most accurate and most stable 10-bit DAC available. The low temperature coefficient, high stability thin-film network is trimmed at the wafer level by a fine resolution laser system to 0.01% typical linearity. This results in an accuracy specification of ±1/4 LSB max for the K and T versions, and 1/2 LSB max for the J and S versions.

The AD561 also incorporates a low noise, high stability subsurface zener diode to produce a reference voltage with excellent long term stability and temperature cycle characteristics, which challenge the best discrete Zener references. A temperature compensation circuit is laser-trimmed to allow custom correction of the temperature coefficient of each device. This results in a typical full-scale temperature coefficient of 15 ppm/°C; the TC is tested and guaranteed to 30 ppm/°C max for the K and T versions, 60 ppm/°C max for the S, and 80 ppm/°C for the J.

The AD561 is available in four performance grades. The AD561J and K are specified for use over the 0°C to +70°C temperature range and are available in either a 16-pin hermetically-sealed ceramic DIP or a 16-pin molded plastic DIP. The AD561S and T grades are specified for the -55°C to +125°C range and are available in the ceramic package.

Funkcje

Tłumaczenie AI
  • Complete Current Output Converter
  • High Stability Buried Zener Reference
  • Laser Trimmed to High Accuracy (1/4 LSB Max Error, AD561K, T)
  • Trimmed Output Application Resistors for 0 V to ±10 V, ±5 V Ranges
  • Fast Settling – 250 ns to 1/2 LSB
  • Guaranteed Monotonicity Over Full Operating Temperature Range
  • TTL/DTL and CMOS Compatible (Positive True Logic)
  • Single Chip Monolithic Construction
  • Available in Chip Form
  • MlL-STD-883-Compliant Versions Available