Rochester Electronics 54LS224AJ/B

These 64-bit memories are low-power Schottky memory arrays organized as 16 words × 4 bits. They can be expanded in multiples of 15m + 1 words or 4n bits, or both simultaneously (where n is the number of packages in the vertical array and m is the number of packages in the horizontal array), with some external gating required. For long words using 'LS224 or 'LS228, to achieve proper synchronization, the IR signal of the first-stage package and the OR signal of the last-stage package must be ANDed together.

• Independent synchronous inputs and outputs
• Each containing 16 4-bit words
• Three-state outputs for direct bus driving
• Data rates from 0 to 10MHz
• Typical propagation delay of 50ns
• Data terminal layout optimized for PCB design
• Expandable via external strobe

• None