Infineon CY8C4147LQS-S443T

PSoC™ 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm® Cortex®-M0+ CPU while being AEC-Q100 compliant. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. PSoC™ 4100S Plus is a member of the PSoC™ 4 platform architecture. It is a combination of a microcontroller with standard communication and timing peripherals, a capacitive touch-sensing system (CAPSENSE™) with best-in-class performance, programmable general-purpose continuous-time and switched-capacitor analog blocks, and programmable connectivity. PSoC™4100S Plus products will be upward compatible with members of the PSoC™ 4 platform for new applications and design needs.

• Automotive Electronics Council (AEC) AEC-Q100 Qualified
• 32-bit MCU subsystem
  • 48-MHz Arm® Cortex®-M0+ CPU
  • Up to 128 KB of flash with Read Accelerator
  • Up to 16 KB of SRAM
  • 8-channel DMA engine
• Programmable analog
  • Two opamps with reconfigurable high-drive external and high-bandwidth internal drive and comparator modes and ADC input buffering capability. Opamps can operate in Deep Sleep low-power mode.
  • 12-bit 1-Msps SAR ADC with differential and single-ended modes, and channel sequencer with signal averaging
  • Single-slope 10-bit ADC function provided by a capacitance sensing block
  • Two current DACs (IDACs) for general-purpose or capacitive sensing applications on any pin
  • Two low-power comparators that operate in Deep Sleep low-power mode
• Programmable digital
  • Programmable logic blocks allowing Boolean operations to be performed on port inputs and outputs
• Low-power 1.71 V to 5.5 V operation
  • Deep Sleep mode with operational analog and 2.5 μA digital system current
• Capacitive sensing
  • Capacitive sigma-delta (CSD) provides best-in-class signal-to-noise ratio (SNR) (>5:1) and water tolerance
  • Infineon-supplied software component makes capacitive sensing design easy
  • Automatic hardware tuning (SmartSense)
• LCD drive capability
  • LCD segment drive capability on GPIOs
• Serial communication
  • Five independent run-time reconfigurable serial communication blocks (SCBs) with re-configurable I²C, SPI, UART functionality, or LIN slave functionality
• Timing and pulse-width modulation
  • Eight 16-bit timer/counter/pulse-width modulator (TCPWM) blocks
  • Center-aligned, Edge, and Pseudo-random modes
  • Comparator-based triggering of Kill signals for motor drive and other high-reliability digital logic applications
  • Quadrature decoder
• Clock sources
  • 4 to 33 MHz external crystal oscillator (ECO)
  • PLL to generate 48-MHz frequency
  • 32-kHz watch crystal oscillator (WCO)
  • ±2% internal main oscillator (IMO)
  • 32-kHz internal low-power oscillator (ILO)
• True random number generator (TRNG)
  • TRNG generates truly random number for secure key generation for cryptography applications
• CAN block
  • CAN 2.0B block with support for time-triggered CAN (TTCAN)
• Temperature range
  • Grade-A: -40℃ to +85℃
  • Grade-S: -40℃ to +105℃
  • Grade-E: -40℃ to +125℃
• Up to 54 programmable GPIO pins
  • 40-pin QFN, 64-pin QFN, and 64-pin TQFP packages
  • Any GPIO pin can be CAPSENSE™, analog, or digital
  • Drive modes, strengths, and slew rates are programmable
• PSoC™ Creator design environment
  • Integrated development environment (IDE) provides schematic design entry and build (with analog and digital automatic routing)
  • Applications programming interface (API) component for all fixed-function and programmable peripherals
• Industry-standard tool compatibility
  • After schematic entry, development can be done with Arm-based industry-standard development tools