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MICROCHIP PIC24F16KL402T-I/SS

Produttore
Cod. Prod.
PIC24F16KL402T-I/SS
Cod. LCSC
C629040
Imballo
SSOP-28-208mil
Numero Cliente
Attr. chiave
PIC 16 Bit 32MHz SSOP-28-208mil Microcontrollers RoHS
Scheda TecnicaMICROCHIP PIC24F16KL402T-I/SS
Conformità RoHS2 documenti disponibili
Parti alternative20
Esaurito
Avvisami
Minimo: 1Multiplo: 1Unità di vendita: Piece
Aggiungi alla Lista BOM
QtàPr. unit.(Solo per riferimento)Importo totale
1+$ 2.6394$ 2.64
200+$ 1.0218$ 204.36
500+$ 0.9863$ 493.15
1,000+$ 0.9678$ 967.80
Package Standard2100/Full Reel
Prezzo migliore per quantità maggiore?
$

Specifiche del Prodotto

Tutto
TipoDescrizione
CategoriaIntegrated Circuits (ICs)/Embedded/Microcontrollers
ProduttoreMICROCHIP
ImballoSSOP-28-208mil
ADC (Bit)10bit
Number of I/O24
Operating Temperature-40℃~+85℃
Program Memory TypeFLASH
Voltage - Supply1.8V~3.6V
EEPROM512Byte
Program Storage Size16KB
CPU CorePIC
Core Size16 Bit
CPU Maximum Speed32MHz
Oscillator TypeBuilt-in

Caratteristiche

Traduzione AI
  • Power Management Modes:
    • Run – CPU, Flash, SRAM and Peripherals On
    • Doze – CPU Clock Runs Slower than Peripherals
    • Idle – CPU Off, SRAM and Peripherals On
    • Sleep – CPU, Flash and Peripherals Off and SRAM On
    • Low-Power Consumption:
      • Run mode currents of 150 μA/MHz typical at 1.8V
      • Idle mode currents under 80 μA/MHz at 1.8V
      • Sleep mode currents as low as 30 nA at +25℃
      • Watchdog Timer as low as 210 nA at +25℃
  • High-Performance CPU:
    • Modified Harvard Architecture
    • Up to 16 MIPS Operation @ 32 MHz
    • 8 MHz Internal Oscillator:
      • 4x PLL option
      • Multiple divide options
    • 17-Bit x 17-Bit Single-Cycle Hardware Fractional/integer Multiplier
    • 32-Bit by 16-Bit Hardware Divider
    • 16 x 16-Bit Working Register Array
    • C Compiler Optimized Instruction Set Architecture (ISA):
      • 76 base instructions
      • Flexible addressing modes
    • Linear Program Memory Addressing
    • Linear Data Memory Addressing
    • Two Address Generation Units (AGU) for Separate Read and Write Addressing of Data Memory
  • Peripheral Features:
    • High-Current Sink/Source (18 mA/18 mA) on All I/O Pins
    • Configurable Open-Drain Outputs on Digital I/O Pins
    • Up to Three External Interrupt Sources
    • Two 16-Bit Timer/Counters with Selectable Clock Sources
    • Up to Two 8-Bit Timers/Counters with Programmable Prescalers
    • Two Capture/Compare/PWM (CCP) modules:
      • Modules automatically configure and drive I/O
      • 16-bit Capture with max. resolution 40 ns
      • 16-bit Compare with max. resolution 83.3 ns
      • 1-bit to 10-bit PWM resolution
    • Up to One Enhanced CCP module:
      • Backward compatible with CCP
      • One, two or four PWM outputs
      • Programmable dead time
      • Auto-shutdown on external event
    • Up to Two Master Synchronous Serial Port modules (MSSPs) with Two Modes of Operation:
      • Three-wire SPI (all four modes)
      • I²C Master, Multi-Master and Slave modes and 7-Bit/10-Bit Addressing
    • Up to Two UART modules:
      • Supports RS-485, RS-232 and LIN/J2602
      • On-chip hardware encoder/decoder for IrDA
      • Auto-wake-up on Start bit
      • Auto-Baud Detect (ABD)
      • Two-byte transmit and receive FIFO buffers
  • Analog Features:
    • 10-Bit, Up to 12-Channel Analog-to-Digital (A/D) Converter:
      • 500 ksps conversion rate
      • Conversion available during Sleep and Idle
    • Dual Rail-to-Rail Analog Comparators with Programmable Input/Output Configuration
    • On-Chip Voltage Reference
  • Special Microcontroller Features:
    • Operating Voltage Range of 1.8V to 3.6V
    • 10,000 Erase/Write Cycle Endurance Flash Program Memory, Typical
    • 100,000 Erase/Write Cycle Endurance Data EEPROM, Typical
    • Flash and Data EEPROM Data Retention: 40 Years Minimum
    • Self-Programmable under Software Control
    • Programmable Reference Clock Output
    • Fail-Safe Clock Monitor (FSCM) Operation:
      • Detects clock failure and switches to on-chip, Low-Power RC (LPRC) Oscillator
    • Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)
    • Flexible Watchdog Timer (WDT):
      • Uses its own Low-Power RC Oscillator
      • Windowed operating modes
      • Programmable period of 2 ms to 131s
    • In-Circuit Serial Programming (ICSP) and In-Circuit Emulation (ICE) via Two Pins
    • Programmable High/Low-Voltage Detect (HLVD)
    • Programmable Brown-out Reset (BOR):
      • Configurable for software controlled operation and shutdown in Sleep mode
      • Selectable trip points (1.8V, 2.7V and 3.0V)
      • Low-power 2.0V POR re-arm

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