MICROCHIP PIC16F15324T-E/ST

PIC16(L)F15324/44 microcontrollers feature Analog, Core Independent Peripherals and Communication Peripherals, combined with eXtreme Low-Power (XLP) technology for a wide range of general purpose and low-power applications. The devices feature multiple PWMs, multiple communication, temperature sensor, and memory features like Memory Access Partition (MAP) to support customers in data protection and bootloader applications, and Device Information Area (DIA) which stores factory calibration values to help improve temperature sensor accuracy.

• C Compiler Optimized RISC Architecture
• Operating Speed: - DC – 32 MHz clock input - 125 ns minimum instruction cycle Interrupt Capability
• 16-Level Deep Hardware Stack
• Timers: - 8-bit Timer2 with Hardware Limit Timer (HLT) - 16-bit Timer0/1
• Low-Current Power-on Reset (POR)
• Configurable Power-up Timer (PWRTE)
• Brown-out Reset (BOR)
• Low-Power BOR (LPBOR) Option
• Windowed Watchdog Timer (WWDT): - Variable prescaler selection - Variable window size selection - All sources configurable in hardware or software
• Programmable Code Protection
• 7 KB Flash Program Memory
• 512 Bytes Data SRAM
• Direct, Indirect and Relative Addressing modes
• Memory Access Partition (MAP): - Write protect - Customizable Partition
• Device Information Area (DIA)
• Device Configuration Information (DCI)
• High-Endurance Flash (HEF) - Last 128 words of Program Memory
• Operating Voltage Range: - 1.8V to 3.6V (PIC16LF15324/44) - 2.3V to 5.5V (PIC16F15324/44)
• Temperature Range: - Industrial: -40℃ to 85℃ - Extended: -40℃ to 125℃
• DOZE mode: Ability to Run the CPU Core Slower than the System Clock
• IDLE mode: Ability to halt CPU Core while Internal Peripherals Continue Operating
• SLEEP mode: Lowest Power Consumption
• Peripheral Module Disable (PMD): - Ability to disable hardware module to minimize active power consumption of unused peripherals
• Sleep mode: 50 nA @1.8V: typical
• Watchdog Timer: 500 nA @ 1.8V, typical
• Operating Current: - 8 μA @ 32 kHz, 1.8V, typical - 32 μA/MHz @ 1.8V, typical
• Four Configurable Logic Cells (CLC): - Integrated combinational and sequential logic
• Complementary Waveform Generator (CWG): - Rising and falling edge dead-band control - Full-bridge, half-bridge, 1-channel drive - Multiple signal sources
• Two Capture/Compare/PWM (CCP) module: - 16-bit resolution for Capture/Compare modes - 10-bit resolution for PWM mode
• Four 10-Bit PWMs
• Numerically Controlled Oscillator (NCO): - Generates true linear frequency control and increased frequency resolution - Input Clock: 0 Hz < F_NCO < 32 MHz - Resolution: F_NCO/2^20
• Two EUSART, RS-232, RS-485, LIN compatible
• I/O Pins: - Individually programmable pull-ups - Slew rate control - Interrupt-on-change with edge-select Input level selection control (ST or TTL) - Digital open-drain enable
• Peripheral Pin Select (PPS): - Enables pin mapping of digital I/O
• Analog-to-Digital Converter (ADC): - 10-bit with up to 43 external channels - Operates in Sleep
• Two Comparators: - FVR, DAC and external input pin available on inverting and noninverting input Software selectable hysteresis Outputs available internally to other modules, or externally through PPS
• 5-Bit Digital-to-Analog Converter (DAC): - 5-bit resolution, rail-to-rail - Positive Reference Selection - Unbuffered I/O pin output - Internal connections to ADCs and comparators
• Voltage Reference: - Fixed Voltage Reference with 1.024V, 2.048V and 4.096V output levels
• Zero-Cross Detect module: - AC high voltage zero-crossing detection for simplifying TRIAC control Synchronized switching control and timing
• High-Precision Internal Oscillator: - Software selectable frequency range up to 32 MHz, ±1% typical
• ×2/×4 PLL with Internal and External Sources
• Low-Power Internal 31 kHz Oscillator (LFINTOSC)
• External Oscillator Block with: - Three crystal/resonator modes up to 20 MHz - Three external clock modes up to 32 MHz
• Fail-Safe Clock Monitor: - Allows for safe shutdown if primary clock stops
• Oscillator Start-up Timer (OST): - Ensures stability of crystal oscillator resources