LCSC Electronics logoLCSC Electronics svg logo
Zaloguj
USD
Nexperia 74AVC2T45DP,125 product image
  • 74AVC2T45DP,125 thumbnail 1
  • 74AVC2T45DP,125 thumbnail 2
  • 74AVC2T45DP,125 thumbnail 3
  • Rozmieszczenie wyprowadzeń
  • Footprint
Zdjęcia poglądowe

Nexperia 74AVC2T45DP,125

Producent
Nr części prod.
74AVC2T45DP,125
Nr LCSC
C478168
Opak.
TSSOP-8-3.0mm
Numer Klienta
Klucz. cechy
500Mbps 1 2 TSSOP-8-3.0mm Translators, Level Shifters RoHS
Karta KatalogowaNexperia 74AVC2T45DP,125
Zgodność z RoHS1 dokumentów dostępnych
Części alternatywne1
Na stanie: 5,450
5,450 W magazynie, wysyłka natychmiastowa
Minimum: 5Wielokrotność: 5Jednostka sprzedaży: Piece
Dodaj do Listy BOM
Szt.Cena jedn.Suma całkowita
5+$ 0.2594$ 1.30
50+$ 0.2059$ 10.30
150+$ 0.183$ 27.45
500+$ 0.1544$ 77.20
3,000+$ 0.1417$ 425.10
6,000+$ 0.1341$ 804.60
Standardowa Obudowa3000/Full Reel
Lepsza cena za większą ilość?
$

Specyfikacje Produktu

Wszystko
TypOpis
KategoriaIntegrated Circuits (ICs)/Logic/Translators, Level Shifters
ProducentNexperia
Opak.TSSOP-8-3.0mm
output typeTri-State
Interface-
Output Signal-
Operating Temperature-40℃~+125℃
Input Signal-
Data Rate500Mbps
Number of Elements1
Channel TypeBidirectional
FeaturesPower-off protection;Output enable high-impedance
Voltage - Supply800mV~3.6V;800mV~3.6V
Number of Circuits2
Current - Output High(IOH)-
Current - Output Low(IOL)-

Opis

Tłumaczenie AI

The 74AVC2T45 is a dual-bit, dual-supply transceiver that enables bidirectional level translation. It features two data input-output ports (nA and nB), a direction control input (DIR) and dual-supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins nA and DIR are referenced to VCC(A) and pins nB are referenced to VCC(B). A HIGH on DIR allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In Suspend mode when either VCC(A) or VCC(B) are at GND level, both A and B are in the high-impedance OFF-state.

Funkcje

Tłumaczenie AI
  • Wide supply voltage range: VCC(A): 0.8 V to 3.6 V VCC(B): 0.8 V to 3.6 V
  • High noise immunity
  • Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-B (2.7 V to 3.6 V)
  • Maximum data rates: 500 Mbit/s (1.8 V to 3.3 V translation)
  • 320 Mbit/s (<1.8 V to 3.3 V translation)
  • 320 Mbit/s (translate to 2.5 V or 1.8 V)
  • 280 Mbit/s (translate to 1.5 V) 240 Mbit/s (translate to 1.2 V)
  • Suspend mode
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Inputs accept voltages up to 3.6 V
  • Low noise overshoot and undershoot <10 % of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 3B exceeds 8000 V
  • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃

Zastosowania

Tłumaczenie AI
  • Level shifting between low-voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V)
  • Partial power-down applications
  • High-speed data transmission (up to 500 Mbit/s)
  • High noise immunity with low noise overshoot/undershoot
  • JEDEC-compliant applications
  • Applications requiring ESD protection
  • Wide temperature range operation (-40°C to +125°C)
  • Multiple package options available

Części alternatywne

MPNProducentOpakowanieDostępnośćCena jednostkowa
74AVC2T45DP-Q100HNexperiaTSSOP-8-3.0mm0$ 0.311