RENESAS R5F111MFAFB#10

Integrated LCD controller/driver, 12-bit resolution A/D Converter, USB 2.0 controller (function), True Low Power Platform (as low as 112.5 μA/Hz, and 0.68 μA for RTC2 + LVD), 1.6 V to 3.6 V operation, 64 to 256 Kbyte Flash, 33 DMIPS at 24 MHz, for All LCD Based Applications

• Ultra-low power consumption technology
  • VDD = single power supply voltage of 1.6 to 3.6 V
  • HALT mode
  • STOP mode
  • SNOOZE mode
• RL78 CPU core
  • CISC architecture with 3-stage pipeline
  • Minimum instruction execution time: Can be changed from high speed (0.04167 μs: @ 24 MHz operation with high-speed on-chip oscillator clock or PLL clock) to ultra-low speed (30.5 μs: @ 32.768 kHz operation with subsystem clock)
  • Multiply/divide and multiply/accumulate instructions are supported.
  • Address space: 1 Mbyte
  • General-purpose registers: (8-bit register x 8) x 4 banks
  • On-chip RAM: 8 to 16 KB
• Code flash memory
  • Code flash memory: 64 to 256 KB
  • Block size: 1 KB
  • Prohibition of block erase and rewriting (security function)
  • On-chip debug function
  • Self-programming (with boot swap function/flash shield window function)
• Data flash memory
  • Data flash memory: 8 KB
  • Background operation (BGO): Instructions can be executed from the program memory while rewriting the data flash memory.
  • Number of rewrites: 1,000,000 times (TYP.)
  • Voltage of rewrites: VDD = 1.8 to 3.6 V
• High-speed on-chip oscillator
  • Select from 48 MHz, 24 MHz, 16 MHz, 12 MHz, 8 MHz, 6 MHz, 4 MHz, 3 MHz, 2 MHz, and 1 MHz
  • High accuracy: ±1.0% (VDD = 1.8 to 3.6 V: TA = -20 to +85 °C)
• Operating ambient temperature
  • TA = -40 to +85 °C (A: Consumer applications)
  • TA = -40 to +105 °C (G: Industrial applications)
• Power management and reset function
  • On-chip power-on-reset (POR) circuit
  • On-chip voltage detector (LVD) (Select interrupt and reset from 12 levels)
• Data transfer controller (DTC)
  • Transfer modes: Normal transfer mode, repeat transfer mode, block transfer mode
  • Activation sources: Activated by interrupt sources (30 to 33 sources).
  • Chain transfer function
• Event link controller (ELC)
  • Event signals of 30 or 31 types can be linked to the specified peripheral function.
• Serial interfaces
  • Simplified SPI (CSI): 4 channels
  • UART/UART (LIN-bus supported): 4 channels
  • I²C/simplified I²C: 5 channels
• Timers
  • 16-bit timer: 11 channels
  • 12-bit interval timer: 1 channel
  • Real-time clock 2: 1 channel (calendar for 99 years, alarm function, and clock correction function)
  • Watchdog timer: 1 channel (operable with the dedicated low-speed on-chip oscillator)
• LCD controller/driver
  • Internal voltage boosting method, capacitor split method, and external resistance division method are switchable.
  • Segment signal output: 44 (40) to 56 (52)
  • Common signal output: 4 (8)
• USB
  • USB version 2.0 (function controller)
  • Full-speed transfer (12 Mbps) and low-speed transfer (1.5 Mbps) are supported
  • Compliant to Battery Charging Specification Revision 1.2
• A/D converter
  • 8/10-bit resolution A/D converter (VDD = 1.6 to 3.6 V)
  • 12-bit resolution A/D converter (VDD = 2.4 to 3.6 V)
  • Analog input: 9 to 13 channels
  • Internal reference voltage (TYP. 1.45 V) and temperature sensor
• D/A converter
  • 8-bit resolution D/A converter (VDD = 1.6 to 3.6 V)
  • Analog output: 2 channels
  • Output voltage: 0 V to VDD
  • Real-time output function
• Comparator
  • 2 channels
  • Operating modes: Comparator high-speed mode, comparator low-speed mode, window mode
  • The external reference voltage or internal reference voltage can be selected as the reference voltage.
• I/O ports
  • I/O ports: 59 to 77 (N-ch open drain I/O [withstand voltage of 6 V]: 2)
  • Can be set to N-ch open drain, TTL input buffer, and on-chip pull-up resistor
  • On-chip key interrupt function
  • On-chip clock output/buzzer output controller
• Others
  • On-chip BCD (binary-coded decimal) correction circuit