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RENESAS R5F572TKEDFP#30

Hersteller
Herst.-Teilenr.
R5F572TKEDFP#30
LCSC-Nr.
C3208447
Verp.
LFQFP-100(14x14)
Kundennummer
Hauptmerkm.
RXv3 32 Bit 200MHz LFQFP-100(14x14) Microcontrollers RoHS
DatenblattRENESAS R5F572TKEDFP#30
Alternativteile10
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Minimum: 1Vielfaches: 1Verkaufseinheit: Piece
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Stk.E-Preis(Nur als Referenz)Gesamtbetrag
1+$ 8.1685$ 8.17
200+$ 3.1616$ 632.32
500+$ 3.0505$ 1525.25
1,000+$ 2.995$ 2995.00
Standardgehäuse90/Full Tray
Besserer Preis bei größerer Menge?
$

Produktspezifikationen

Alle
TypBeschreibung
KategorieIntegrated Circuits (ICs)/Embedded/Microcontrollers
HerstellerRENESAS
Verp.LFQFP-100(14x14)
DAC (Bit)12bit
ADC (Bit)12bit
Number of I/O72
Operating Temperature-40℃~+85℃
Program Memory TypeFLASH
Voltage - Supply2.7V~5.5V
Program Storage Size1MB
EEPROM32KB
CPU CoreRXv3
Core Size32 Bit
CPU Maximum Speed200MHz
Oscillator TypeBuilt-in

Merkmale

KI-Übersetzung
  • 32-bit RXv3 CPU core:
    • Maximum operating frequency: 200 MHz
    • Capacity: 1160 Gs
    • Multiple input operations: 200 MHz
    • JTAG and FINE (single-wire) debug interface
    • Collective register save function
  • Low-power design and architecture:
    • Single 2.7–5.5 V power supply
    • Four low-power modes
  • On-chip code flash:
    • 1 Mbytes/512 Kbytes versions supported
    • Up to 120 MHz or zero wait cycles on ROM cache hit
    • User code programmable on-board or off-board
  • On-chip data flash:
    • 32 Kbytes, reprogrammable up to 100,000 times
    • Program/erase as background operations (BGOs)
  • On-chip SRAM, zero wait states:
    • 128 Kbytes SRAM (zero wait states)
    • 16 Kbytes ECC RAM (with wait)
  • Data transfer:
    • DMAc: 8 channels
    • DTc: 1 channel
  • ELC:
    • Module operations triggered via event signals without CPU interrupts
    • Inter-module linked operations while CPU is in sleep mode
  • Reset and power management:
    • Power-on reset (POR)
    • Low-voltage detection with voltage setting (LVDA)
  • Clock functions:
    • Main clock oscillator resonator frequency: 8 to 24 MHz (usable as PLL reference clock)
    • High-speed on-chip oscillator: 16 MHz/18 MHz/20 MHz (usable as PLL reference clock)
    • Low-speed on-chip oscillator: 240 kHz
  • Independent watchdog timer:
    • 120 kHz IWDT dedicated on-chip oscillator clock operation
  • Useful functions compliant with IEC60730:
    • Oscillation stop detection, A/D converter serial dial clock frequency disconnect detection, clock frequency accuracy measurement circuit, independent watchdog timer, DOC-assisted RAM test function, CRCA, etc.
    • Register write protection to prevent overwriting of critical register values
  • External bus:
    • Bus clock up to 40 MHz
    • Four CS areas
    • 8-bit or 16-bit bus width selectable per area
  • Various communication interfaces:
    • Host/function or OTG controller with full-speed USB 2.0 (USBb) (1 channel)
    • CAN (ISO11898-1 compliant) with 32 mailboxes (1 channel)
    • SCJ and SCII with multiple functions (up to 6 channels)
    • Selectable from asynchronous mode, clock synchronous mode, smart card interface mode, simplified SPI, simplified I²C, and extended serial mode
    • SCII with 16-byte transmit/receive FIFO (1 channel)
    • I²C bus interface (RIIGa) up to 400 kbps (fast mode) with SMBus support (1 channel)
    • RSPId up to 30 Mbps (1 channel)
  • Up to 31 extended function timers:
    • 32-bit GPTW (10 channels): 200 MHz operation, input capture, output compare, PWM waveform: 10 output channels in single-phase complementary PWM mode / 3 output channels in three-phase complementary PWM mode / 2 output channels in five-phase complementary PWM mode, phase count mode, comparator linkage (count operation, PWM inversion control)
    • 16-bit MTU3d (9 channels): 200 MHz operation, input capture, output compare, PWM waveform: 2 output channels in three-phase complementary PWM mode, phase count mode
    • 8-bit TMR (8 channels)
    • 16-bit CMT (4 channels)
  • High-resolution PWM waveform generation circuit (HRPWM): 4 channels
    • Controls rise/fall timing of 32-bit GPTW PWM output waveforms with minimum 195 ps resolution (at 160 MHz operation)
  • 12-bit A/D converter (S12ADH): 30 channels across three units
    • Up to three 12-bit sample-and-hold circuit units: Unit 0 (3 sample-and-hold circuits, 8 channels), Unit 1 (3 sample-and-hold circuits, 8 channels), Unit 2 (14 channels)
    • Programmable gain amplifier with pseudo-differential amplification (3 channels × 2)
  • Analog comparator (CMPC): 6 channels
  • 12-bit D/A converter: 2 channels
    • Usable as reference voltage for analog comparators
  • On-chip temperature sensor for die temperature measurement
  • Cryptographic functions (Trusted Secure IP Lite):
    • AES with 128-bit or 256-bit key length for ECB, CBC, GCM, etc.
    • True random number generator
    • Unauthorized access prevention to cryptographic engine against impersonation and tampering
    • Secure key management
  • Up to 110 general-purpose I/O port pins:
    • 5 V tolerant, open-drain, input pull-up, switchable drive capability
  • Recommended operating temperature range (Topr):
    • -40°C to +85°C
    • -40°C to +105°C

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