LCSC Electronics logoLCSC Electronics svg logo
Accedi
USD
TI SN74HCT373PWR product image
  • SN74HCT373PWR thumbnail 1
  • SN74HCT373PWR thumbnail 2
  • SN74HCT373PWR thumbnail 3
  • Pinout
  • Footprint
Immagini a scopo illustrativo

TI SN74HCT373PWR

Produttore
Cod. Prod.
SN74HCT373PWR
Cod. LCSC
C240801
Imballo
TSSOP-20
Numero Cliente
Attr. chiave
OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
Scheda TecnicaTI SN74HCT373PWR
Conformità RoHS2 documenti disponibili
Parti alternative10
Disponibile: 1,073
1,073 Pronta consegna
Minimo: 1Multiplo: 1Unità di vendita: Piece
Aggiungi alla Lista BOM
QtàPr. unit.Importo totale
1+$ 0.7558$ 0.76
10+$ 0.622$ 6.22
30+$ 0.555$ 16.65
100+$ 0.4881$ 48.81
500+$ 0.4489$ 224.45
1,000+$ 0.4277$ 427.70
Package Standard2000/Full Reel
Prezzo migliore per quantità maggiore?
$

Specifiche del Prodotto

Tutto
TipoDescrizione
CategoriaIntegrated Circuits (ICs)/Logic/Latches
ProduttoreTI
ImballoTSSOP-20
Quiescent Current80uA
Series74HC
Logic TypeD Latch
Voltage - Supply4.5V~5.5V
Current - Output Low(IOL)6mA
Operating Temperature-40℃~+85℃
Output TypeTri-State
Current - Output High(IOH)6mA
Number of Gates8
Setup Time12ns
Hold Time10ns
Propagation Delay25ns

Descrizione

Traduzione AI

These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight latches of the ’HCT373 devices are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels that were set up at the D inputs. An output-enable (OE(overline)) input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are off.

Caratteristiche

Traduzione AI
  • Operating Voltage Range of 4.5 V to 5.5 V
  • High-Current 3-State True Outputs Can Drive Up To 15 LSTTL Loads
  • Low Power Consumption, 80 μA Max ICC
  • Typical tpd = 21 ns
  • ±6 mA Output Drive at 5 V
  • Low Input Current of 1 μA Max
  • Inputs Are TTL-Voltage Compatible
  • Eight High-Current Latches in a Single Package
  • Full Parallel Access for Loading

Applicazioni

Traduzione AI
  • Buffer registers
  • I/O ports
  • Bidirectional bus drivers
  • Working registers

Parti alternative

MPNProduttoreImballaggioDisponibilitàPrezzo unitario
SN74HCT573PWRTITSSOP-20860$ 0.5411
CJ74HCT373BGNJSCJTSSOP-2015$ 0.1236
MM74HCT373MTConsemiTSSOP-200$ 0.2709
CJ74HCT573BGNJSCJTSSOP-200$ 0.2984
MC74HCT373ADTR2GonsemiTSSOP-200$ 0.3441
AiP74HCT573TA20.TBWuxi I-core ElecTSSOP-200$ 0.242
MM74HCT573MTCXonsemiTSSOP-200$ 0.4321
74HCT573PW-Q100118NexperiaTSSOP-200$ 0.206
74HCT573PW-Q100,11NexperiaTSSOP-200$ 0.7949
74HCT373TVELL-ERENESASTSSOP-200$ 0.5213