SILICON LABS SI53315-B-GM

The Si53315 is an ultra low jitter ten output differential buffer with pin-selectable output clock signal format and individual OE. The Si53315 features a 2:1 mux, making it ideal for redundant clocking applications. The Si53315 utilizes advanced CMOS technology to fanout clocks from 1 MHz to 1.25 GHz with guaranteed low additive jitter, low skew, and low propagation delay variability. The Si53315 features minimal cross-talk and provides superior supply noise rejection, simplifying low jitter clock distribution in noisy environments. Independent core and output bank supply pins provide integrated level translation without the need for external circuitry.

• 10 differential or 20 LVCMOS outputs
• Ultra-low additive jitter: 100 fs rms
• Wide frequency range: 1 MHz to 1.25 GHz
• Any-format input with pin selectable output formats: LVPECL, Low Power LVPECL, LVDS, CML, HCSL, LVCMOS
• 2:1 mux with hot-swappable inputs
• Asynchronous output enable
• Individual output enable
• Low output-output skew: <50 ps
• Low propagation delay variation: <400 ps
• Independent VDD and VDDO: 1.8/2.5/3.3 V
• Excellent power supply noise rejection (PSRR)
• Selectable LVCMOS drive strength to tailor jitter and EMI performance
• Small size: 44-QFN (7 mm x 7 mm)
• RoHS compliant, Pb-free
• Industrial temperature range: –40 to +85 °C

• High-speed clock distribution
• Ethernet switch/router
• Optical Transport Network (OTN)
• SONET/SDH
• PCI Express Gen 1/2/3
• Storage
• Telecom
• Industrial
• Servers
• Backplane clock distribution