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EDA-ModelleEasyEDA
GSI Technology GS8662DT38BGD-500I
| Hersteller | GSI TechnologyAsian Brands |
| Herst.-Teilenr. | GS8662DT38BGD-500I |
| LCSC-Nr. | C6867390 |
| Verp. | FPBGA-165(13x15) |
| Kundennummer | |
| Hauptmerkm. | 72Mbit 1.7V~1.9V FPBGA-165(13x15) Memory RoHS |
| Datenblatt | GSI Technology GS8662DT38BGD-500I |
Produktspezifikationen
Alle
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Memory/Memory | |
| Hersteller | GSI Technology | |
| Verp. | FPBGA-165(13x15) | |
| Operating Temperature | -40℃~+100℃ | |
| Features | Built-in delay-locked loop;Boundary scan (JTAG) function | |
| Memory Size | 72Mbit | |
| Voltage - Supply | 1.7V~1.9V | |
| Access Time | - | |
| Current - Supply | - | |
| Standby Supply Current | - | |
| Interface | - |
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Memory/Memory | |
| Hersteller | GSI Technology | |
| Verp. | FPBGA-165(13x15) | |
| Operating Temperature | -40℃~+100℃ | |
| Features | Built-in delay-locked loop;Boundary scan (JTAG) function | |
| Memory Size | 72Mbit |
| Typ | Beschreibung | |
|---|---|---|
| Voltage - Supply | 1.7V~1.9V | |
| Access Time | - | |
| Current - Supply | - | |
| Standby Supply Current | - | |
| Interface | - |
Hilfe & FeedbackÄhnliche Produkte anzeigen (0) >
Beschreibung
KI-Übersetzung
GS8662DT06/11/20/38BD complies with the SigmaQuad-II+ SRAM pin standard and is a 75,497,472-bit (72Mb) separate I/O synchronous SRAM. They are part of a low-power, low-voltage HSTL I/O SRAM family, designed to operate at the speeds required for cost-effective, high-performance networking systems.
Merkmale
KI-Übersetzung
- 2.5 clock latency
- Simultaneous read/write interface
- Standard-compliant pinout and package
- Double data rate interface
- Byte write control sampled at data input
- Burst length of 4 read/write operations
- Dual-range on-chip termination for data, byte write, and clock inputs
- 1.8V ±100mV core supply voltage
- 1.5V or 1.8V HSTL interface
- Pipelined read operation
- Fully coherent read/write pipeline
- ZQ pin for programmable output drive strength
- Data valid pin support
- IEEE 1149.1 JTAG-compliant boundary scan
- 165-bump, 13mm × 15mm, 1mm bump pitch BGA package
- RoHS-compliant 165-bump BGA package available
Anwendungen
KI-Übersetzung
- High-performance network systems
Nicht vorrätig
Benachrichtigen
Minimum: 1Vielfaches: 1Verkaufseinheit: Piece
Zur BOM-Liste hinzufügen
| Stk. | E-Preis(Nur als Referenz) | Gesamtbetrag |
|---|---|---|
| 1+ | $ 329.1002 | $ 329.10 |
| 195+ | $ 131.3138 | $ 25606.19 |
| 495+ | $ 126.925 | $ 62827.88 |
| 1,005+ | $ 124.7568 | $ 125380.58 |
Standardgehäuse15/Full Tray | ||
Besserer Preis bei größerer Menge?
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Produktspezifikationen
Alle
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Memory/Memory | |
| Hersteller | GSI Technology | |
| Verp. | FPBGA-165(13x15) | |
| Operating Temperature | -40℃~+100℃ | |
| Features | Built-in delay-locked loop;Boundary scan (JTAG) function | |
| Memory Size | 72Mbit | |
| Voltage - Supply | 1.7V~1.9V | |
| Access Time | - | |
| Current - Supply | - | |
| Standby Supply Current | - | |
| Interface | - |
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Memory/Memory | |
| Hersteller | GSI Technology | |
| Verp. | FPBGA-165(13x15) | |
| Operating Temperature | -40℃~+100℃ | |
| Features | Built-in delay-locked loop;Boundary scan (JTAG) function | |
| Memory Size | 72Mbit |
| Typ | Beschreibung | |
|---|---|---|
| Voltage - Supply | 1.7V~1.9V | |
| Access Time | - | |
| Current - Supply | - | |
| Standby Supply Current | - | |
| Interface | - |
Hilfe & FeedbackÄhnliche Produkte anzeigen (0) >
Beschreibung
KI-Übersetzung
GS8662DT06/11/20/38BD complies with the SigmaQuad-II+ SRAM pin standard and is a 75,497,472-bit (72Mb) separate I/O synchronous SRAM. They are part of a low-power, low-voltage HSTL I/O SRAM family, designed to operate at the speeds required for cost-effective, high-performance networking systems.
Merkmale
KI-Übersetzung
- 2.5 clock latency
- Simultaneous read/write interface
- Standard-compliant pinout and package
- Double data rate interface
- Byte write control sampled at data input
- Burst length of 4 read/write operations
- Dual-range on-chip termination for data, byte write, and clock inputs
- 1.8V ±100mV core supply voltage
- 1.5V or 1.8V HSTL interface
- Pipelined read operation
- Fully coherent read/write pipeline
- ZQ pin for programmable output drive strength
- Data valid pin support
- IEEE 1149.1 JTAG-compliant boundary scan
- 165-bump, 13mm × 15mm, 1mm bump pitch BGA package
- RoHS-compliant 165-bump BGA package available
Anwendungen
KI-Übersetzung
- High-performance network systems
C6867390 EasyEDA-Bibliothek
Compliance & Exportcodes
| Typ | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991B2B |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Typ | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991B2B |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Typ | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |