MICROCHIP PIC16F18346-I/SO

PIC16(L)F18326/18346 microcontrollers feature Analog, Core Independent Peripherals and Communication Peripherals, combined with eXtreme Low Power (XLP) for a wide range of general purpose and low-power applications. The Peripheral Pin Select (PPS) functionality enables pin mapping when using the digital peripherals (CLC, CWG, CCP, PWM and communications) to add flexibility to the application design.

• C Compiler Optimized RISC Architecture
• Operating Speed:
  • DC – 32 MHz clock input
  • 125 ns minimum instruction cycle
• Interrupt Capability
• 16-Level Deep Hardware Stack
• Up to Four 8-bit Timers
• Up to Three 16-bit Timers
• Low-Current Power-on Reset (POR)
• Power-up Timer (PWRTE)
• Brown-out Reset (BOR) Option
• Low-Power BOR (LPBOR) Option
• Extended Watchdog Timer (WDT) with Dedicated On-Chip Oscillator for Reliable Operation
• Programmable Code Protection
• 28 Kbytes Program Flash Memory
• 2 KB Data SRAM Memory
• 256B of EEPROM
• Direct, Indirect and Relative Addressing Modes
• Operating Voltage Range:
  • 1.8V to 3.6V (PIC16LF18326/18346)
  • 2.3V to 5.5V (PIC16F18326/18346)
• Temperature Range:
  • Industrial: -40℃ to 85℃
  • Extended: -40℃ to 125℃
• Sleep mode: 40 nA @1.8V, typical
• Watchdog Timer: 250 nA @ 1.8V, typical
• Secondary Oscillator: 300 nA ×32 kHz
• Operating Current:
  • 8 μA @ 32 kHz, 1.8V, typical
  • 37 μA/MHz @ 1.8V, typical
• IDLE mode: ability to put the CPU core to Sleep while internal peripherals continue operating from the system clock
• DOZE mode: ability to run the CPU core slower than the system clock used by the internal peripherals
• SLEEP mode: Lowest Power Consumption
• Peripheral Module Disable (PMD): peripheral power disable hardware module to minimize power consumption of unused peripherals
• Configurable Logic Cell (CLC):
  • Four CLCs
  • Integrated combinational and sequential logic
• Complementary Waveform Generator (CWG):
  • Two CWGs
  • Rising and falling edge dead-band control
  • Full-bridge, half-bridge, 1-channel drive
  • Multiple signal sources
• Capture/Compare/PWM (CCP) modules:
  • Four CCPs
  • 16-bit resolution for Capture/Compare modes
  • 10-bit resolution for PWM mode
• Pulse-Width Modulators (PWM):
  • Two 10-bit PWMs
• Numerically Controlled Oscillator (NCO):
  • Precision linear frequency generator (@50% duty cycle) with 0.0001% step size of source input clock
  • Input Clock: 0 Hz < F_NCO < 32 MHz
  • Resolution: F_NCO/2^20
• Serial Communications:
  • EUSART
  • RS-232, RS-485, LIN compatible
  • Auto-Baud Detect, auto-wake-up on start
  • Master Synchronous Serial Port (MSSP)
  • SPI
  • I2C, SMBus, PMBus compatible
• Data Signal Modulator (DSM):
  • Modulates a carrier signal with digital data to create custom carrier synchronized output waveforms
• Up to 18 I/O Pins:
  • Individually programmable pull-ups
  • Slew rate control
  • Interrupt-on-change with edge-select
  • Input level selection control (ST or TTL)
  • Digital open-drain enable
• Peripheral Pin Select (PPS):
  • I/O pin remapping of digital peripherals
• Timer modules:
  • Timer0:
    • 8/16-bit timer/counter
    • Synchronous or asynchronous operation
    • Programmable prescaler/postscaler
    • Time base for capture/compare function
  • Timer1/3/5 with gate control:
    • 16-bit timer/counter
    • Programmable internal or external clock sources
    • Multiple gate sources
    • Multiple gate modes
    • Time base for capture/compare function
  • Timer2/4/6:
    • 8-bit timers
    • Programmable prescaler/postscaler
    • Time base for PWM function
• 10-bit Analog-to-Digital Converter (ADC):
  • 17 external channels
  • Conversion available during Sleep
• Comparator:
  • Two comparators
  • Fixed Voltage Reference at non-inverting input(s)
  • Comparator outputs externally accessible
• 5-bit Digital-to-Analog Converter (DAC):
  • 5-bit resolution, rail-to-rail
  • Positive Reference Selection
  • Unbuffered I/O pin output
  • Internal connections to ADCs and comparators
• Voltage Reference:
  • Fixed Voltage Reference with 1.024V, 2.048V and 4.096V output levels
  • Flexible Oscillator Structure
• High-Precision Internal Oscillator:
  • Software-selectable frequency range up to 32 MHz
  • ±1% at nominal 4 MHz calibration point
• 4× PLL with External Sources
• Low-Power Internal 31 kHz Oscillator (LFINTOSC)
• External Low-Power 32 kHz Crystal Oscillator (SOSC)
• External Oscillator Block with:
  • Three Crystal/Resonator modes up to 20 MHz
  • Three External Clock modes up to 20 MHz
  • Fail-Safe Clock Monitor
  • Detects clock source failure
  • Oscillator Start-up Timer (OST)
  • Ensures stability of crystal oscillator sources