LCSC Electronics logoLCSC Electronics svg logo
로그인
USD
TI TLC555CP product image
  • TLC555CP thumbnail 1
  • TLC555CP thumbnail 2
  • TLC555CP thumbnail 3
  • 핀아웃
  • 풋프린트
실제 제품과 다를 수 있음

TI TLC555CP

제조업체
제조사 품번
TLC555CP
LCSC 번호
C910886
포장
PDIP-8
고객 번호
주요 제원
Single-chip timing circuit
데이터시트TI TLC555CP
RoHS 준수2개 문서 이용 가능
대체 부품10
재고 있음: 276
276 재고 있음, 당일 발송
최소값: 1배수: 1판매 단위: Piece
BOM 목록에 추가
수량단가총액
1+$ 0.9484$ 0.95
10+$ 0.7901$ 7.90
50+$ 0.6628$ 33.14
100+$ 0.5828$ 58.28
500+$ 0.5354$ 267.70
1,000+$ 0.511$ 511.00
표준 패키지50/Full Tube
수량이 많을수록 더 좋은 가격?
$

제품 사양

전체
타입설명
카테고리Integrated Circuits (ICs)/Clock/Timing/Programmable Timers and Oscillators
제조업체TI
포장PDIP-8
Supply Current170uA
Operating Temperature0℃~70℃
FeaturesReset function
Output Current100mA
Timer Number1
Voltage - Supply2V~15V
도움말 및 피드백유사 제품 보기 (0) >

개요

AI 번역

The TLC555 is a monolithic timing circuit fabricated using TI LinCMOS™ technology. This timer is fully compatible with CMOS, TTL, and MOS logic devices and operates at frequencies up to 2MHz. Due to its high input impedance, this device supports smaller timing capacitors than those used with the NE555 or LM555. As a result, more accurate time delays and oscillations can be achieved. Low power consumption is maintained across the entire supply voltage range.

Like the NE555, the TLC555 has a trigger level of approximately one-third of the supply voltage and a threshold level of approximately two-thirds of the supply voltage. These levels can be modified using the control voltage terminal (CONT). When the trigger input (TRIG) falls below the trigger level, the flip-flop is set and the output goes high. If TRIG is above the trigger level and the threshold input (THRES) is above the threshold level, the flip-flop is reset and the output goes low. The reset input (RESET) takes priority over all other inputs and can be used to initiate a new timing cycle. If RESET is low, the flip-flop is reset and the output goes low. Whenever the output is low, a low-impedance path is provided between the discharge terminal (DISCH) and ground (GND). All unused inputs must be tied to an appropriate logic level to prevent false triggering.

주요 특징

AI 번역
  • Ultra-low power consumption: 1mW (typical) at VDD = 5V
  • Operates in astable mode
  • CMOS output with rail-to-rail swing
  • High output current capability
    • Sink current: 100mA (typical)
    • Source current: 10mA (typical)
  • Output fully compatible with CMOS, TTL, and MOS
  • Low supply current with reduced spikes during output transitions
  • 2V to 15V single-supply operation
  • Functionally interchangeable with NE555; identical pinout
  • ESD protection exceeds 2000V per MIL-STD-883C Method 3015.2
  • Available in Q-grade temperature for automotive
  • High-reliability automotive applications
  • Configuration control and documentation support
  • Qualified to automotive standards

응용 분야

AI 번역
  • Precision timing
  • Pulse generation
  • Sequential timing
  • Time delay generation
  • PWM
  • Pulse position modulation
  • Linear ramp generation

대체 부품

MPN제조사포장재고 현황단가
HT7555CNZHTCSEMIDIP-8420$ 0.3321
XD551XINLUDADIP-8690$ 0.1569
XD555XINLUDADIP-8180$ 0.1769
TLC555NHGSEMIDIP-8110$ 0.2412
TLC555IPTIPDIP-892$ 1.8641
NE555NHTCDIP-81,740$ 0.306
AiP555DA8.TBWuxi I-core ElecDIP-8500$ 0.2199
ICM7555IPAZRENESASDIP-83$ 1.1407
NE555PTIDIP-87,295$ 0.2706
NE555NHGSEMIDIP-83,955$ 0.1609