RENESAS R5F563TBBDFH#V1
| Hersteller | |
| Herst.-Teilenr. | R5F563TBBDFH#V1 |
| LCSC-Nr. | C7334352 |
| Verp. | LQFP-112(20x20) |
| Kundennummer | |
| Hauptmerkm. | RX 32 Bit 100MHz LQFP-112(20x20) Microcontrollers RoHS |
| Datenblatt | RENESAS R5F563TBBDFH#V1 |
| Alternativteile | 13 |
Produktspezifikationen
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Hersteller | RENESAS | |
| Verp. | LQFP-112(20x20) | |
| DAC (Bit) | 10bit | |
| ADC (Bit) | 10bit;12bit | |
| Number of I/O | 69 | |
| Operating Temperature | -40℃~+85℃ | |
| Program Memory Type | FLASH | |
| Voltage - Supply | 2.7V~3.6V | |
| EEPROM | 32KB | |
| Program Storage Size | 256KB | |
| CPU Core | RX | |
| Core Size | 32 Bit | |
| CPU Maximum Speed | 100MHz | |
| Oscillator Type | Built-in |
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Hersteller | RENESAS | |
| Verp. | LQFP-112(20x20) | |
| DAC (Bit) | 10bit | |
| ADC (Bit) | 10bit;12bit | |
| Number of I/O | 69 | |
| Operating Temperature | -40℃~+85℃ | |
| Program Memory Type | FLASH |
| Typ | Beschreibung | |
|---|---|---|
| Voltage - Supply | 2.7V~3.6V | |
| EEPROM | 32KB | |
| Program Storage Size | 256KB | |
| CPU Core | RX | |
| Core Size | 32 Bit | |
| CPU Maximum Speed | 100MHz | |
| Oscillator Type | Built-in |
Beschreibung
100-MHz 32-bit RX MCU, on-chip FPU, 165 DMIPS, Mar 31, 2016 Two 12-bit ADCs (three S/H circuits, double data registers, amplifier, comparator), one 10-bit ADC, simultaneous sampling on 7 channels using three ADCs, 100 MHz PWM (2 three-phase complementary channels +4 single-phase complementary channels or 3 three-phase complementary channels + 1 single-phase complementary channel)
Merkmale
- 32-bit RX CPU core
- Max. operating frequency: 100 MHz
- Capable of 165 DMIPS in operation at 100 MHz
- Single precision 32-bit IEEE-754 floating point
- Two types of multiply-and-accumulation unit (between memories and between registers)
- 32-bit multiplier (fastest instruction execution takes one CPU clock cycle)
- Divider (fastest instruction execution takes two CPU clock cycles)
- Fast interrupt
- CISC Harvard architecture with 5-stage pipeline
- Variable-length instructions: Ultra-compact code
- Supports the memory protection unit (MPU)
- Two types of debugging interfaces: JTAG and FINE (two-line)
- Low-power design and architecture
- Single 3.3-V supply or single 5-V supply; 3.3-V products can be used with a 5-V analog power supply
- Four low-power modes
- On-chip main flash memory, no wait states
- 100-MHz operation, 10-ns read cycle (no wait states)
- Max. 512 Kbytes
- User code is programmable by USB, SCI, or JTAG.
- On-chip data flash memory
- Max. 32 Kbytes, reprogrammable up to 100,000 times
- Programming/erasing as background operations (BGOs)
- On-chip SRAM, no wait states
- Max. 48 Kbytes
- For instructions and operands
- DMA
- DMA: Incorporates four channels
- DTC: A single unit can handle transfer on multiple channels.
- Reset and supply management
- Power-on reset (POR)
- Low voltage detection (LVD) with voltage settings
- Clock functions
- External crystal oscillator or internal PLL for operation at 4 to 12.5 MHz
- Internal 125-kHz LOCO
- Dedicated 125-kHz LOCO for the IWDT
- Independent watchdog timer
- 125-kHz LOCO clock operation
- Useful functions for IEC60730 compliance
- Oscillation-stop detection, frequency measurement, CRC, IWDT, self-diagnostic function for the A/D converter, etc.
- External address space
- 4 CS areas (4×1 Mbyte)
- Multiplexed address data or separate address lines are selectable per area.
- 8- or 16-bit bus space is selectable per area.
- Up to 11 communications interfaces
- USB 2.0 full-speed function interface (1 channel)
- CAN (compliant with ISO11898-1), incorporating 32 mailboxes (1 channel)
- SCI with multiple functionalities (5 channels) Choose from among asynchronous mode, clock-synchronous mode, smart-card interface mode, simple SPI, simple I²C, and extended serial mode.
- I²C bus interface for SMBus (2 channels)
- RSPI for high-speed transfer (2 channels)
- Up to twenty 16-bit timers
- 16-bit MTU3: 100-MHz operation, input capture, output compare, three-phase complementary PWM waveform output (2 channels), phase-counting mode (8 channels); complementary PWM does not burden the CPU.
- 16-bit GPT: 100-MHz operation, input capture, output compare, 4-channel single-phase complementary PWM waveform output or 1-channel three-phase complementary + 1-channel single-phase complementary output, interlocking with comparator (counter operation, PWM negation control), detection of abnormal oscillation frequencies (useful for IEC60730 compliance) (8 channels); complementary PWM does not burden the CPU.
- 16-bit CMT (4 channels)
- Generation of delays in PWM waveforms (for products with the product ID code 1)
- The timing with which signals on the 16-bit GPT PWM output pin rise and fall can be controlled with an accuracy of up to 312 ps (in operation at 100 MHz).
- Two A/D converters for 1-MHz operation, total of 8 channels
- Simultaneous sampling on 7 channels is possible with three units.
- Self-diagnosis function (useful for IEC60730 compliance)
- Two 12-bit ADCs: three sample-and-hold circuits, double data registers, amplifier, comparator (8 channels)
- One 10-bit ADC (12 channels)
- One 10-bit ADC (20 channels)
- 10-bit D/A converter: 2 channels
- Digital Power Supply Controller-Dedicated Calculation Function (for products with product ID code 1)
- 16-bit fixed-point calculation function that handles compensatory calculations in the method of digital control for switched-mode power supplies.
- Register write protection function can protect values in important registers against overwriting.
- Up to 110 pins for GPIO
- Open drain, switchable driving ability
- Operating temp. range
- -40℃ to +85℃
- -40℃ to +105℃
| Stk. | E-Preis(Nur als Referenz) | Gesamtbetrag |
|---|---|---|
| 1+ | $ 21.7042 | $ 21.70 |
| 180+ | $ 8.6601 | $ 1558.82 |
| 480+ | $ 8.3712 | $ 4018.18 |
| 1,020+ | $ 8.2284 | $ 8392.97 |
Standardgehäuse60/Full Tray | ||
Produktspezifikationen
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Hersteller | RENESAS | |
| Verp. | LQFP-112(20x20) | |
| DAC (Bit) | 10bit | |
| ADC (Bit) | 10bit;12bit | |
| Number of I/O | 69 | |
| Operating Temperature | -40℃~+85℃ | |
| Program Memory Type | FLASH | |
| Voltage - Supply | 2.7V~3.6V | |
| EEPROM | 32KB | |
| Program Storage Size | 256KB | |
| CPU Core | RX | |
| Core Size | 32 Bit | |
| CPU Maximum Speed | 100MHz | |
| Oscillator Type | Built-in |
| Typ | Beschreibung | |
|---|---|---|
| Kategorie | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Hersteller | RENESAS | |
| Verp. | LQFP-112(20x20) | |
| DAC (Bit) | 10bit | |
| ADC (Bit) | 10bit;12bit | |
| Number of I/O | 69 | |
| Operating Temperature | -40℃~+85℃ | |
| Program Memory Type | FLASH |
| Typ | Beschreibung | |
|---|---|---|
| Voltage - Supply | 2.7V~3.6V | |
| EEPROM | 32KB | |
| Program Storage Size | 256KB | |
| CPU Core | RX | |
| Core Size | 32 Bit | |
| CPU Maximum Speed | 100MHz | |
| Oscillator Type | Built-in |
Beschreibung
100-MHz 32-bit RX MCU, on-chip FPU, 165 DMIPS, Mar 31, 2016 Two 12-bit ADCs (three S/H circuits, double data registers, amplifier, comparator), one 10-bit ADC, simultaneous sampling on 7 channels using three ADCs, 100 MHz PWM (2 three-phase complementary channels +4 single-phase complementary channels or 3 three-phase complementary channels + 1 single-phase complementary channel)
Merkmale
- 32-bit RX CPU core
- Max. operating frequency: 100 MHz
- Capable of 165 DMIPS in operation at 100 MHz
- Single precision 32-bit IEEE-754 floating point
- Two types of multiply-and-accumulation unit (between memories and between registers)
- 32-bit multiplier (fastest instruction execution takes one CPU clock cycle)
- Divider (fastest instruction execution takes two CPU clock cycles)
- Fast interrupt
- CISC Harvard architecture with 5-stage pipeline
- Variable-length instructions: Ultra-compact code
- Supports the memory protection unit (MPU)
- Two types of debugging interfaces: JTAG and FINE (two-line)
- Low-power design and architecture
- Single 3.3-V supply or single 5-V supply; 3.3-V products can be used with a 5-V analog power supply
- Four low-power modes
- On-chip main flash memory, no wait states
- 100-MHz operation, 10-ns read cycle (no wait states)
- Max. 512 Kbytes
- User code is programmable by USB, SCI, or JTAG.
- On-chip data flash memory
- Max. 32 Kbytes, reprogrammable up to 100,000 times
- Programming/erasing as background operations (BGOs)
- On-chip SRAM, no wait states
- Max. 48 Kbytes
- For instructions and operands
- DMA
- DMA: Incorporates four channels
- DTC: A single unit can handle transfer on multiple channels.
- Reset and supply management
- Power-on reset (POR)
- Low voltage detection (LVD) with voltage settings
- Clock functions
- External crystal oscillator or internal PLL for operation at 4 to 12.5 MHz
- Internal 125-kHz LOCO
- Dedicated 125-kHz LOCO for the IWDT
- Independent watchdog timer
- 125-kHz LOCO clock operation
- Useful functions for IEC60730 compliance
- Oscillation-stop detection, frequency measurement, CRC, IWDT, self-diagnostic function for the A/D converter, etc.
- External address space
- 4 CS areas (4×1 Mbyte)
- Multiplexed address data or separate address lines are selectable per area.
- 8- or 16-bit bus space is selectable per area.
- Up to 11 communications interfaces
- USB 2.0 full-speed function interface (1 channel)
- CAN (compliant with ISO11898-1), incorporating 32 mailboxes (1 channel)
- SCI with multiple functionalities (5 channels) Choose from among asynchronous mode, clock-synchronous mode, smart-card interface mode, simple SPI, simple I²C, and extended serial mode.
- I²C bus interface for SMBus (2 channels)
- RSPI for high-speed transfer (2 channels)
- Up to twenty 16-bit timers
- 16-bit MTU3: 100-MHz operation, input capture, output compare, three-phase complementary PWM waveform output (2 channels), phase-counting mode (8 channels); complementary PWM does not burden the CPU.
- 16-bit GPT: 100-MHz operation, input capture, output compare, 4-channel single-phase complementary PWM waveform output or 1-channel three-phase complementary + 1-channel single-phase complementary output, interlocking with comparator (counter operation, PWM negation control), detection of abnormal oscillation frequencies (useful for IEC60730 compliance) (8 channels); complementary PWM does not burden the CPU.
- 16-bit CMT (4 channels)
- Generation of delays in PWM waveforms (for products with the product ID code 1)
- The timing with which signals on the 16-bit GPT PWM output pin rise and fall can be controlled with an accuracy of up to 312 ps (in operation at 100 MHz).
- Two A/D converters for 1-MHz operation, total of 8 channels
- Simultaneous sampling on 7 channels is possible with three units.
- Self-diagnosis function (useful for IEC60730 compliance)
- Two 12-bit ADCs: three sample-and-hold circuits, double data registers, amplifier, comparator (8 channels)
- One 10-bit ADC (12 channels)
- One 10-bit ADC (20 channels)
- 10-bit D/A converter: 2 channels
- Digital Power Supply Controller-Dedicated Calculation Function (for products with product ID code 1)
- 16-bit fixed-point calculation function that handles compensatory calculations in the method of digital control for switched-mode power supplies.
- Register write protection function can protect values in important registers against overwriting.
- Up to 110 pins for GPIO
- Open drain, switchable driving ability
- Operating temp. range
- -40℃ to +85℃
- -40℃ to +105℃
Compliance & Exportcodes
| Typ | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Typ | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Typ | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |
Alternativteile
| MPN | Hersteller | Verpackung | Verfügbarkeit | Stückpreis | ||
|---|---|---|---|---|---|---|
| R5F563TBEDFH#V0 | RENESAS | LQFP-112(20x20) | 0 | $ 9.3952 | ||
| R5F563TCEDFH#V0 | RENESAS | LQFP-112(20x20) | 0 | $ 10.2965 | ||
| R5F563TCBDFH#V1 | RENESAS | LQFP-112(20x20) | 0 | $ 11.184 | ||
| R5F563TCBDFH#V0 | RENESAS | LQFP-112(20x20) | 0 | $ 10.2223 | ||
| R5F563TEEDFH#V0 | RENESAS | LQFP-112(20x20) | 0 | $ 10.7633 | ||
| R5F563TEBDFH#V1 | RENESAS | LQFP-112(20x20) | 0 | $ 13.3927 | ||
| R5F563TEBDFH#V0 | RENESAS | LQFP-112(20x20) | 0 | $ 29.7178 | ||
| R5F563TBDDFH#V0 | RENESAS | LQFP-112(20x20) | 0 | $ 10.0712 | ||
| R5F563TBADFH#V1 | RENESAS | LQFP-112(20x20) | 0 | $ 10.4092 | ||
| R5F563TCADFH#V1 | RENESAS | LQFP-112(20x20) | 0 | $ 11.894 | ||
| R5F563TCDDFH#V1 | RENESAS | LQFP-112(20x20) | 0 | $ 25.7344 | ||
| R5F563TEDDFH#V0 | RENESAS | LQFP-112(20x20) | 0 | $ 12.4867 | ||
| R5F563TEADFH#V1 | RENESAS | LQFP-112(20x20) | 0 | $ 12.8417 |

