LCSC Electronics logoLCSC Electronics svg logo
Anmelden
USD
TI CD40106BE product image
  • CD40106BE thumbnail 1
  • CD40106BE thumbnail 2
  • CD40106BE thumbnail 3
  • Pinbelegung
  • Footprint
Abbildung ähnlich

TI CD40106BE

Hersteller
Herst.-Teilenr.
CD40106BE
LCSC-Nr.
C71251
Verp.
DIP-14
Kundennummer
Hauptmerkm.
CMOS Hex Schmitt Triggers
DatenblattTI CD40106BE
RoHS-Konformität2 Dokumente verfügbar
Vorrätig: 1,299
1,299 Ab Lager, sofort versandfertig
Minimum: 1Vielfaches: 1Verkaufseinheit: Piece
Zur BOM-Liste hinzufügen
Stk.E-PreisGesamtbetrag
1+$ 0.5687$ 0.57
10+$ 0.4442$ 4.44
25+$ 0.377$ 9.43
100+$ 0.3098$ 30.98
500+$ 0.2803$ 140.15
1,000+$ 0.2623$ 262.30
Standardgehäuse25/Full Tube
Besserer Preis bei größerer Menge?
$

Produktspezifikationen

Alle
TypBeschreibung
KategorieIntegrated Circuits (ICs)/Logic/Gates and Inverters
HerstellerTI
Verp.DIP-14
Logic Family4000B
Input TypeSchmitt trigger
Voltage - Supply3V~18V
Output Logic Level - Low50mV
Propagation Delay120ns@15V,50pF
FeaturesNoise suppression function
Operating Temperature-55℃~+125℃
Input Logic Level - High3.6V~10.8V
Input Logic Level - Low900mV~4V
Output Logic Level - High4.95V;9.95V;14.95V
Quiescent Current(Iq)4uA
Current - Output High(IOH)3.4mA
Number of Channels6
Current - Output Low(IOL)3.4mA

Beschreibung

KI-Übersetzung

CD40106B consists of six Schmitttrigger circuits. Each circuit functions as an inverter with Schmitt-trigger action on the input. The trigger switches at different points for positive- and negative-going signals. The difference between the positive-going voltage (VP) and the negative-going voltage is defined as hysteresis voltage. The CD40106B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

Merkmale

KI-Übersetzung
  • Schmitt-trigger action with no external components
  • Hysteresis voltage (typ.) 0.9 V at VDD = 5 V, 2.3 V at VDD = 10 V, and 3.5 V at VDD = 15 V
  • Noise immunity greater than 50%
  • No limit on input rise and fall times
  • Standardized, symmetrical output characteristics tested for quiescent current at 20 V
  • Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Low VDD to Vss current during slow input ramp
  • 5-V, 10-V, and 15-V parametric ratings
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"

Anwendungen

KI-Übersetzung
  • Wave and pulse shapers
  • High-noise-environment systems
  • Monostable multivibrators
  • Astable multivibrators