ADI ADSP-BF536BBCZ3BRL

The ADSP-BF534/ADSP-BF536/ADSP-BF537 processors are members of the Blackfin family of products, incorporating the Analog Devices, Inc./Intel Micro Signal Architecture (MSA). Blackfin processors combine a dual-MAC, state-of-the-art signal processing engine, the advantages of a clean, orthogonal RISC-like microprocessor instruction set, and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The ADSP-BF534/ADSP-BF536/ADSP-BF537 processors are completely code and pin compatible. They differ only with respect to their performance, on-chip memory, and presence of the Ethernet MAC module.

• Up to 600 MHz high performance Blackfin processor
• Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs, 40-bit shifter
• RISC-like register and instruction model for ease of programming and compiler-friendly support
• Advanced debug, trace, and performance monitoring
• Wide range of operating voltages
• Qualified for Automotive Applications
• Programmable on-chip voltage regulator
• 182-ball and 208-ball CSP_BGA packages
• IEEE 802.3-compliant 10/100 Ethernet MAC (ADSP-BF536 and ADSP-BF537 only)
• Controller area network (CAN) 2.0B interface
• Parallel peripheral interface (PII), supporting ITU-R 656 video data formats
• 2 dual-channel, full-duplex synchronous serial ports (SPORTs), supporting 8 stereo S channels
• 12 peripheral DMAs, 2 mastered by the Ethernet MAC
• 2 memory-to-memory DMAs with external request lines
• Event handler with 32 interrupt inputs
• Serial peripheral interface (SPI) compatible
• 2 UARTs with IrDA support
• 2-wire interface (TWI) controller
• Eight 32-bit timer/counters with PWM support
• Real-time clock (RTC) and watchdog timer
• 32-bit core timer
• 48 general-purpose I/Os (GPIOs), 8 with high current drivers
• On-chip PLL capable of frequency multiplication
• Debug/JTAG interface