MICROCHIP dsPIC33CK64MP508-I/PT
| Producent | |
| Nr części prod. | dsPIC33CK64MP508-I/PT |
| Nr LCSC | C635446 |
| Opak. | TQFP-80(12x12) |
| Numer Klienta | |
| Klucz. cechy | 100MHz TQFP-80(12x12) Microcontrollers RoHS |
| Karta Katalogowa | MICROCHIP dsPIC33CK64MP508-I/PT |
| Zgodność z RoHS | 2 dokumentów dostępnych |
Specyfikacje Produktu
Wszystko
| Typ | Opis | |
|---|---|---|
| Kategoria | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Producent | MICROCHIP | |
| Opak. | TQFP-80(12x12) | |
| Operating Temperature | -40℃~+85℃ | |
| Clock Rate | 100MHz |
| Typ | Opis | |
|---|---|---|
| Kategoria | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Producent | MICROCHIP | |
| Opak. | TQFP-80(12x12) |
| Typ | Opis | |
|---|---|---|
| Operating Temperature | -40℃~+85℃ | |
| Clock Rate | 100MHz |
Pomoc i opiniePokaż podobne produkty (0) >
Funkcje
Tłumaczenie AI
- 32 - 256 Kbytes of Program Flash with ECC and 8 - 24K RAM
- Fast 6 - Cycle Divide
- LiveUpdate
- Code Efficient (C and Assembly) Architecture
- 40 - Bit Wide Accumulators
- Single - Cycle (MAC/MPY) with Dual Data Fetch
- Single - Cycle, Mixed - Sign MUL Plus Hardware Divide
- 32 - Bit Multiply Support
- Four Sets of Interrupt Context Saving Registers which include Accumulator and STATUS for Fast Interrupt Handling
- Zero Overhead Looping
- RAM Memory Built - In Self - Test (MBIST)
- Internal Oscillator
- Programmable PLLs and Oscillator Clock Sources
- Reference Clock Output
- Fail - Safe Clock Monitor (FSCM)
- Fast Wake - up and Start - up
- Backup Internal Oscillator
- Low - Power Management Modes (Sleep, Idle, Doze)
- Integrated Power - on Reset and Brown - out Reset
- Eight PWM Pairs
- Up to 250 ps PWM Resolution
- Dead Time for Rising and Falling Edges
- Dead - Time Compensation
- Clock Chopping for High - Frequency Operation
- Fault and Current Limit Inputs
- Flexible Trigger Configuration for ADC Triggering
- One General Purpose Timer
- Peripheral Trigger Generator (PTG): Up to 15 trigger sources to other peripheral modules
- CPU independent state machine - based instruction sequencer
- Nine MCCP/SCCP modules which Include Timer, Capture/Compare and PWM:
- One MCCP
- Eight SCCPs
- 16 or 32 - bit time base
- 16 or 32 - bit capture
- 4 - deep capture buffer
- Fully Asynchronous Operation, Available in Sleep Modes
- High - Speed ADC module:
- 12 - bit with two dedicated SAR ADC cores and one shared SAR ADC core
- Configurable resolution (up to 12 - bit) for each ADC core
- Up to 3.5 Msps conversion rate per channel at 12 - bit resolution
- Up to 24 input channels
- Dedicated result buffer for each analog channel
- Flexible and independent ADC trigger sources
- Four digital comparators
- Four oversampling filters for increased resolution
- Up to Three Analog Comparators: 15 ns analog comparator
- Up to Three Op Amps
- Three 12 - Bit DACs: Hardware slope compensation
- Three Protocol UARTs with Automated Protocol Handling Support for: LIN2.2 DMX IrDA
- Four - Wire SPI/I²S modules
- CAN Flexible Data (FD) module
- Three I²C modules with SMBus Support
- PPS to Allow Function Remap
- Programmable Cyclic Redundancy Check (CRC)
- Two SENT modules
- Parallel Master Port (PMP)
- Four DMA Channels
- In - Circuit and In - Application Programming and Debugging
- Three Complex, Five Simple Breakpoints
- IEEE 1149.2 Compatible (JTAG) Boundary Scan
- Trace Buffer and Run - Time Watch
- Clock Monitor System with Backup Oscillator
- DMT (Deadman Timer)
- ECC (Error Correcting Code)
- WDT (Watchdog Timer)
- CodeGuard Security
- CRC (Cyclic Redundancy Check)
- Flash OTP by ICSP Write Inhibit
- RAM Memory Built - In Self - Test (MBIST)
- Two - Speed Start - up
- Fail - Safe Clock Monitoring (FSCM)
- Backup FRC (BFRC)
- Capless Internal Voltage Regulator
- Virtual Pins for Redundancy and Monitoring
- Class B Safety Library - IEC 60730
- For ASIL B and Beyond Applications - ISO 26262
- FMEDA Computation Spreadsheet (Evaluation of Random Hardware Failures Metric)
- Functional Safety Manual
- Functional Safety Diagnostics Suite
- AEC - Q100 REV - H (Grade 1: - 40°C to + 125°C) Compliant
- AEC - Q100 REV - H (Grade 0: - 40°C to + 150°C) Compliant
Zastosowania
Tłumaczenie AI
- DC/DC, AC/DC, inverters, PFC, lighting
- BLDC, PMSM, ACIM, SRM motors
Na stanie: 10
10 W magazynie, wysyłka natychmiastowa
Minimum: 1Wielokrotność: 1Jednostka sprzedaży: Piece
Dodaj do Listy BOM
| Szt. | Cena jedn. | Suma całkowita |
|---|---|---|
| 1+ | $ 4.7057 | $ 4.71 |
| 10+ | $ 4.5921 | $ 45.92 |
| 30+ | $ 4.5175 | $ 135.53 |
| 100+ | $ 4.4412 | $ 444.12 |
Standardowa Obudowa119/Full Tray | ||
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Specyfikacje Produktu
Wszystko
| Typ | Opis | |
|---|---|---|
| Kategoria | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Producent | MICROCHIP | |
| Opak. | TQFP-80(12x12) | |
| Operating Temperature | -40℃~+85℃ | |
| Clock Rate | 100MHz |
| Typ | Opis | |
|---|---|---|
| Kategoria | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Producent | MICROCHIP | |
| Opak. | TQFP-80(12x12) |
| Typ | Opis | |
|---|---|---|
| Operating Temperature | -40℃~+85℃ | |
| Clock Rate | 100MHz |
Pomoc i opiniePokaż podobne produkty (0) >
Funkcje
Tłumaczenie AI
- 32 - 256 Kbytes of Program Flash with ECC and 8 - 24K RAM
- Fast 6 - Cycle Divide
- LiveUpdate
- Code Efficient (C and Assembly) Architecture
- 40 - Bit Wide Accumulators
- Single - Cycle (MAC/MPY) with Dual Data Fetch
- Single - Cycle, Mixed - Sign MUL Plus Hardware Divide
- 32 - Bit Multiply Support
- Four Sets of Interrupt Context Saving Registers which include Accumulator and STATUS for Fast Interrupt Handling
- Zero Overhead Looping
- RAM Memory Built - In Self - Test (MBIST)
- Internal Oscillator
- Programmable PLLs and Oscillator Clock Sources
- Reference Clock Output
- Fail - Safe Clock Monitor (FSCM)
- Fast Wake - up and Start - up
- Backup Internal Oscillator
- Low - Power Management Modes (Sleep, Idle, Doze)
- Integrated Power - on Reset and Brown - out Reset
- Eight PWM Pairs
- Up to 250 ps PWM Resolution
- Dead Time for Rising and Falling Edges
- Dead - Time Compensation
- Clock Chopping for High - Frequency Operation
- Fault and Current Limit Inputs
- Flexible Trigger Configuration for ADC Triggering
- One General Purpose Timer
- Peripheral Trigger Generator (PTG): Up to 15 trigger sources to other peripheral modules
- CPU independent state machine - based instruction sequencer
- Nine MCCP/SCCP modules which Include Timer, Capture/Compare and PWM:
- One MCCP
- Eight SCCPs
- 16 or 32 - bit time base
- 16 or 32 - bit capture
- 4 - deep capture buffer
- Fully Asynchronous Operation, Available in Sleep Modes
- High - Speed ADC module:
- 12 - bit with two dedicated SAR ADC cores and one shared SAR ADC core
- Configurable resolution (up to 12 - bit) for each ADC core
- Up to 3.5 Msps conversion rate per channel at 12 - bit resolution
- Up to 24 input channels
- Dedicated result buffer for each analog channel
- Flexible and independent ADC trigger sources
- Four digital comparators
- Four oversampling filters for increased resolution
- Up to Three Analog Comparators: 15 ns analog comparator
- Up to Three Op Amps
- Three 12 - Bit DACs: Hardware slope compensation
- Three Protocol UARTs with Automated Protocol Handling Support for: LIN2.2 DMX IrDA
- Four - Wire SPI/I²S modules
- CAN Flexible Data (FD) module
- Three I²C modules with SMBus Support
- PPS to Allow Function Remap
- Programmable Cyclic Redundancy Check (CRC)
- Two SENT modules
- Parallel Master Port (PMP)
- Four DMA Channels
- In - Circuit and In - Application Programming and Debugging
- Three Complex, Five Simple Breakpoints
- IEEE 1149.2 Compatible (JTAG) Boundary Scan
- Trace Buffer and Run - Time Watch
- Clock Monitor System with Backup Oscillator
- DMT (Deadman Timer)
- ECC (Error Correcting Code)
- WDT (Watchdog Timer)
- CodeGuard Security
- CRC (Cyclic Redundancy Check)
- Flash OTP by ICSP Write Inhibit
- RAM Memory Built - In Self - Test (MBIST)
- Two - Speed Start - up
- Fail - Safe Clock Monitoring (FSCM)
- Backup FRC (BFRC)
- Capless Internal Voltage Regulator
- Virtual Pins for Redundancy and Monitoring
- Class B Safety Library - IEC 60730
- For ASIL B and Beyond Applications - ISO 26262
- FMEDA Computation Spreadsheet (Evaluation of Random Hardware Failures Metric)
- Functional Safety Manual
- Functional Safety Diagnostics Suite
- AEC - Q100 REV - H (Grade 1: - 40°C to + 125°C) Compliant
- AEC - Q100 REV - H (Grade 0: - 40°C to + 150°C) Compliant
Zastosowania
Tłumaczenie AI
- DC/DC, AC/DC, inverters, PFC, lighting
- BLDC, PMSM, ACIM, SRM motors
C635446 Biblioteka EasyEDA
Zgodność & Kody Eksportowe
| Typ | Szczegóły |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Typ | Szczegóły |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Typ | Szczegóły |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |



