SKYWORKS SI5327C-C-GM

The Si5327 is a jitter-attenuating precision clock multiplier for applications requiring sub 1 ps jitter performance. The Si5327 accepts two input clocks ranging from 2 kHz to 710 MHz and generates two output clocks ranging from 2 kHz to 808 MHz. The two outputs are divided down separately from a common source. The Si5327 can also use its crystal oscillator as a clock source for frequency synthesis. The device provides virtually any frequency translation combination across this operating range. The Si5327 input clock frequency and clock multiplication ratio are programmable through an I²C or SPI interface. The Si5327 is based on 3rd-generation DSPLL technology, which provides frequency synthesis and jitter attenuation in a highly integrated PLL solution that eliminates the need for external VCXO and loop filter components. The DSPLL loop bandwidth is digitally programmable, providing jitter performance optimization at the application level. Operating from a single 1.8, 2.5, or 3.3 V supply, the Si5327 is ideal for providing clock multiplication and jitter attenuation in high performance timing applications.

• Generates any frequency from 2 kHz to 808 MHz from an input frequency of 2 kHz to 710 MHz
• Ultra-low jitter clock outputs with jitter generation as low as 0.5 ps rms (12 kHz–20 MHz)
• Integrated loop filter with selectable loop bandwidth (4 to 525 Hz)
• Meets OC-192 GR-253-CORE jitter specifications

• SONET/SDH OC-48/OC-192/STM16/STM-64 line cards
• ITU G.709 and custom FEC line cards
• GbE/10GbE, 1/2/4/8/10G Fibre Channel line cards
• Synchronous Ethernet
• Optical modules
• Wireless repeaters/wireless backhaul
• Data converter clocking
• xDSL
• PDH clock synthesis
• Test and measurement
• Broadcast video